3,223 research outputs found

    Joint Source-Channel Coding over a Fading Multiple Access Channel with Partial Channel State Information

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    In this paper we address the problem of transmission of correlated sources over a fast fading multiple access channel (MAC) with partial channel state information available at both the encoders and the decoder. We provide sufficient conditions for transmission with given distortions. Next these conditions are specialized to a Gaussian MAC (GMAC). We provide the optimal power allocation strategy and compare the strategy with various levels of channel state information. Keywords: Fading MAC, Power allocation, Partial channel state information, Correlated sources.Comment: 7 Pages, 3 figures. To Appear in IEEE GLOBECOM, 200

    Distributed Nonparametric Sequential Spectrum Sensing under Electromagnetic Interference

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    A nonparametric distributed sequential algorithm for quick detection of spectral holes in a Cognitive Radio set up is proposed. Two or more local nodes make decisions and inform the fusion centre (FC) over a reporting Multiple Access Channel (MAC), which then makes the final decision. The local nodes use energy detection and the FC uses mean detection in the presence of fading, heavy-tailed electromagnetic interference (EMI) and outliers. The statistics of the primary signal, channel gain or the EMI is not known. Different nonparametric sequential algorithms are compared to choose appropriate algorithms to be used at the local nodes and the FC. Modification of a recently developed random walk test is selected for the local nodes for energy detection as well as at the fusion centre for mean detection. It is shown via simulations and analysis that the nonparametric distributed algorithm developed performs well in the presence of fading, EMI and is robust to outliers. The algorithm is iterative in nature making the computation and storage requirements minimal.Comment: 8 pages; 6 figures; Version 2 has the proofs for the theorems. Version 3 contains a new section on approximation analysi

    Capacity of Fading Gaussian Channel with an Energy Harvesting Sensor Node

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    Network life time maximization is becoming an important design goal in wireless sensor networks. Energy harvesting has recently become a preferred choice for achieving this goal as it provides near perpetual operation. We study such a sensor node with an energy harvesting source and compare various architectures by which the harvested energy is used. We find its Shannon capacity when it is transmitting its observations over a fading AWGN channel with perfect/no channel state information provided at the transmitter. We obtain an achievable rate when there are inefficiencies in energy storage and the capacity when energy is spent in activities other than transmission.Comment: 6 Pages, To be presented at IEEE GLOBECOM 201

    Combined Integer and Floating Point Multiplication Architecture(CIFM) for FPGAs and Its Reversible Logic Implementation

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    In this paper, the authors propose the idea of a combined integer and floating point multiplier(CIFM) for FPGAs. The authors propose the replacement of existing 18x18 dedicated multipliers in FPGAs with dedicated 24x24 multipliers designed with small 4x4 bit multipliers. It is also proposed that for every dedicated 24x24 bit multiplier block designed with 4x4 bit multipliers, four redundant 4x4 multiplier should be provided to enforce the feature of self repairability (to recover from the faults). In the proposed CIFM reconfigurability at run time is also provided resulting in low power. The major source of motivation for providing the dedicated 24x24 bit multiplier stems from the fact that single precision floating point multiplier requires 24x24 bit integer multiplier for mantissa multiplication. A reconfigurable, self-repairable 24x24 bit multiplier (implemented with 4x4 bit multiply modules) will ideally suit this purpose, making FPGAs more suitable for integer as well floating point operations. A dedicated 4x4 bit multiplier is also proposed in this paper. Moreover, in the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. It is not possible to realize quantum computing without reversible logic. Thus, this paper also paper provides the reversible logic implementation of the proposed CIFM. The reversible CIFM designed and proposed here will form the basis of the completely reversible FPGAs.Comment: Published in the proceedings of the The 49th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2006), Puerto Rico, August 2006. Nominated for the Student Paper Award(12 papers are nominated for Student paper Award among all submissions
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