Relative luminosity measurement of the LHC with the ATLAS forward calorimeter

In this paper it is shown that a measurement of the relative luminosity changes at the LHC may be obtained by analysing the currents drawn from the high voltage power supplies of the electromagnetic section of the forward calorimeter of the ATLAS detector. The method was verified with a reproduction of a small section of the ATLAS forward calorimeter using proton beams of known beam energies and variable intensities at the U-70 accelerator at IHEP in Protvino, Russia. The experimental setup and the data taking during a test beam run in April 2008 are described in detail. A comparison of the measured high voltage currents with reference measurements from beam intensity monitors shows a linear dependence on the beam intensity. The non-linearities are measured to be less than 0.5 % combining statistical and systematic uncertainties.Comment: 16 page

The ATLAS Level-1 muon topological trigger information for run 2 of the LHC

For run 2 of the LHC, the ATLAS Level-1 trigger system will include topological information on trigger objects in order to cope with the increased trigger rates. The existing Muon-to-Central-Trigger- Processor interface (MUCTPI) has been modified in order to provide coarse-grained topological information on muon candidates. A MUCTPI- to-Level-1-Topological-Processor interface (MuCTPiToTopo) has been developed to receive the electrical information and to send it optically to the Level-1 Topological Processor (L1TOPO). This poster will describe the different modules mentioned above and present results of functionality and connection tests performed

When does the co-evolution of technology and science overturn into technoscience?

In this paper, the relations between science and technology, intervention and representation, the natural and the artificial are analysed on the background of the formation of modern science in the sixteenth century. Due to the fact that technique has been essential for modern science from its early beginning, modern science is characterised by a hybridisation of knowledge and intervention. The manipulation of nature in order to measure its properties has steadily increased until artificial things have been produced, such as laser beams, chemical compounds, elementary particles. Furthermore, the structural bracing of natural science, technological development, and industrial exploitation of nature go also back to the foundation of modern science. In order to strengthen the debate on technoscience against this background, the specific characteristics of technoscientific objects have to be clarified as have the specific characteristics of the social organisation of technoscience and its performance

Upgrade of the ATLAS Level‐1 trigger with an FPGA based Topological Processor

The ATLAS experiment is located at the European Centre for Nuclear Research (CERN) in Switzerland. It is designed to measure decay properties of high energetic particles produced in the protons collisions at the Large Hadron Collider (LHC). LHC proton collision at a frequency of 40 MHz, requires a trigger system to efficiently select events down to a manageable event storage rate of about 400 Hz. Event triggering is therefore one of the extraordinary challenges faced by the ATLAS detector. The Level-1 Trigger is the first rate-reducing step in the ATLAS Trigger, with an output rate of 75kHz and decision latency of less than 2.5$\mu$s. It is primarily composed of the Calorimeter Trigger, Muon Trigger, the Central Trigger Processor (CTP). Due to the increase in the LHC instantaneous luminosity up to 3$\times$10$^{34}$cm$^{−2}$s$^{−1}$ in 2015, a new element will be included in the Level-1 Trigger scheme: the Topological Processor (L1Topo). The L1Topo receive data in a dedicated format from the calorimeters and muon detectors to be processed into specific topological algorithms. Those algorithms sits in high-end FPGAs to perform geometrical cuts, correlations and calculate complex observables as the invariant mass. The output of such topological cuts is sent to the CTP. Since the Level-1 trigger it’s a fixed latency pipelined system the main requirement for the L1Topo is a large input bandwidth ($\approx$ 1Tb/s), optical connectivity and low processing latency on the Real Time data path. This presentation focuses on the design of the L1Topo final production module and the tests results on L1Topo prototypes. Such tests are aimed at characterizing high-speed links (signal integrity, bit error rate, margin analysis and latency) plus algorithms logic resource utilization

An FPGA based topological processor prototype for the ATLAS Level-1 trigger upgrade

By 2014 the LHC will collide proton bunches at 14TeV with an increased instantaneous luminosity up to 3·10³⁴cm⁻²s⁻¹. The resulting higher event rate will challenge the existing ATLAS trigger system. A reduction on the trigger rate can be achieved by selecting interesting channels based on their expected decay topology and thus reducing background. This will be achieved by introducing of a new FPGA based module in the Level-1 trigger: the Topological Processor L1Topo. With L1Topo it will be possible for the first time to concentrate detailed information from the entire calorimeters and the muon detector into a single module. L1Topo will receive a total aggregate bandwidth of 1Tb/s. The data is processed within less than 100ns, requiring high density optical I/O and high bandwidth, which is achieved by adopting state-of-the-art FPGAs with embedded multi-Gb/s transceivers and multi-Gb/s opto converters. This paper focuses on the design of the first L1Topo prototype. The L1Topo design adopts technologies that have been implemented into a previous ATCA form factor demonstrator module. The latest results on the implementation of a topological algorithm in the demonstrator module and FPGA logic utilization of the algorithm are presented. Beyond results of a measurement of the latency, induced by the demonstrator module's FPGA's integrated Multi-Gb/s transceivers, are reported

An FPGA based demonstrator for a topological processor in the future ATLAS L1-Calo trigger “GOLD”

Abstract: The existing ATLAS trigger consists of three levels. The level 1 (L1) is an FPGAs based custom designed trigger, while the second and third levels are software based. The LHC machine plans to bring the beam energy to the maximum value of 7 TeV and to increase the luminosity in the coming years. The current L1 trigger system is therefore seriously challenged. To cope with the resulting higher event rate, as part of the ATLAS trigger upgrade, a new electronics module is foreseen to be added in the ATLAS Level-1 Calorimeter Trigger electronics chain: the Topological Processor (TP). Such a processor needs fast optical I/O and large aggregate bandwidth to use the information on trigger object position in space (e.g. jets in the calorimeters or muons measured in the muon detectors) to improve the purity of the L1 triggers streams by applying topological cuts within the L1 latency budget. In this paper, an overview of the adopted technological solutions and the R&D activities on the demonstrator for the TP (“GOLD”) are presented