Frequency-Multiplexed Array Digitization for MIMO Receivers: 4-Antennas/ADC at 28 GHz on Xilinx ZCU-1285 RF SoC

Communications at mm-wave frequencies and above rely heavily on beamforming antenna arrays. Typically, hundreds, if not thousands, of independent antenna channels are used to achieve high SNR for throughput and increased capacity. Using a dedicated ADC per antenna receiver is preferable but it\u27s not practical for very large arrays due to unreasonable cost and complexity. Frequency division multiplexing (FDM) is a well-known technique for combining multiple signals into a single wideband channel. In a first of its kind measurements, this paper explores FDM for combining multiple antenna outputs at IF into a single wideband signal that can be sampled and digitized using a high-speed wideband ADC. The sampled signals are sub-band filtered and digitally down-converted to obtain individual antenna channels. A prototype receiver was realized with a uniform linear array consisting of 4 elements with 250 MHz bandwidth per channel at 28 GHz carrier frequency. Each of the receiver chains were frequency-multiplexed at an intermediate frequency of 1 GHz to avoid the requirement for multiple, precise local oscillators (LOs). Combined narrowband receiver outputs were sampled using a single ADC with digital front-end operating on a Xilinx ZCU-1285 RF SoC FPGA to synthesize 4 digital beams. The approach allows $M$ -fold increase in spatial degrees of freedom per ADC, for temporal oversampling by a factor of $M$

Towards a Low-SWaP 1024-beam Digital Array: A 32-beam Sub-system at 5.8 GHz

Millimeter wave communications require multibeam beamforming in order to utilize wireless channels that suffer from obstructions, path loss, and multi-path effects. Digital multibeam beamforming has maximum degrees of freedom compared to analog phased arrays. However, circuit complexity and power consumption are important constraints for digital multibeam systems. A low-complexity digital computing architecture is proposed for a multiplication-free 32-point linear transform that approximates multiple simultaneous RF beams similar to a discrete Fourier transform (DFT). Arithmetic complexity due to multiplication is reduced from the FFT complexity of $\mathcal{O}(N\: \log N)$ for DFT realizations, down to zero, thus yielding a 46% and 55% reduction in chip area and dynamic power consumption, respectively, for the $N=32$ case considered. The paper describes the proposed 32-point DFT approximation targeting a 1024-beams using a 2D array, and shows the multiplierless approximation and its mapping to a 32-beam sub-system consisting of 5.8 GHz antennas that can be used for generating 1024 digital beams without multiplications. Real-time beam computation is achieved using a Xilinx FPGA at 120 MHz bandwidth per beam. Theoretical beam performance is compared with measured RF patterns from both a fixed-point FFT as well as the proposed multiplier-free algorithm and are in good agreement.Comment: 19 pages, 8 figures, 4 tables. This version corrects a typo in the matrix equations from Section

Low-complexity wideband transmit array using variable-precision 2-d sparse FIR digital filters

A low-complexity wideband transmit beamformer is proposed using a digitally-fed uniform linear array of broadband Vivaldi antennas operating in the S-band. The proposed transmit beamformer employs a novel DSP feeding network based on a transmit-mode 2-D sparse finite-extent impulse response (FIR) filter having a planar passband in the 2-D frequency-wavenumber space. Electronic beam steering is achieved by changing the filter coefficients defined in closed-form and hard-thresholding (HT) is employed to obtain a sparse 2-D impulse responses of the filter. Full-wave electromagnetic simulations are used to obtain the far-field beam patterns produced by the 2-D sparse FIR filter in the frequency range 2-2.8 GHz for wideband signals with 33% fractional bandwidth. Computational complexity, beam directionality and side-lobe performance are investigated with varying HT along with quantitative comparisons with an equally selective wideband frequency-domain phased array

Real-Time FPGA-Based multi-beam directional sensing of 2.4 GHz ISM RF sources

A real-time directional sensing system is proposed for 2:4 GHz ISM band by exploiting the concept of spatiotemporal spectral white spaces. The proposed system consists of a 16-element patch antenna array, an FFT-based multi-beam beamformer and an energy detector. Our system operates at the baseband with quadrature sampling. Furthermore, digital architectures for two energy detectors that employ integrate-anddump circuits are presented. With the multi-beam beamformer, the first energy detector can be employed to directional sensing and the second can be employed for both directional and spectral sensing of radio frequency sources. The multi-beam beamformer having 16 beams and the energy detectors are implemented on a ROACH-2 based FPGA system with a 160 MHz clock. With an 8-point temporal FFT, the second energy detector provides approximately 20 MHz bandwidth per temporal FFTbin. Preliminary experimental measurements obtained with Wi- Fi devices and the first energy detector verify the proof-of-concept directional sensing of the proposed system