3D-Silicon and Passive CMOS Sensors for Pixel Detectors in High Radiation Environments

The future upgrade of the Large Hadron Collider to the High-Luminosity LHC demands new pixel detectors that can operate in environments with exceptionally high radiation. This requires investigations into new radiation-tolerant sensor technologies and readout electronics, and the advancement of radiation-damage models. In this work, planar- and 3D-silicon sensors from the latest upgrade of the ATLAS pixel detector~(IBL) and novel passive CMOS sensors are characterized after high levels of irradiation. New measurement techniques for the readout chip (ATLAS FE-I4) enabled precise charge-collection efficiency studies with highly segmented silicon sensors and the extraction of radiation-damage model parameters. A dedicated simulation, based on a model with just 2 parameters, successfully describes the dependence of charge collection on sensor voltage up to a fluence of 5e15 neq/cm² NIEL. The life-time of charge-carriers in silicon at 5e15 neq/cm² NIEL is determined to be (0.75 ± 0.08) ns. At 7e15 neq/cm², the charge-collection efficiency is about 50 % for 3D- and 250 um planar-silicon sensor designs. The 3D-silicon sensors demonstrate a much lower power consumption (~15 %), which is an important advantage for their potential usage in the innermost layer of the future pixel detector. For the outer pixel layer, which has relaxed requirements for radiation-tolerance (1e15 neq/cm²), a novel prototype of a planar silicon sensor is characterized. Since the sensor implantations are produced using a 150 nm CMOS process from LFoundry, they are termed 'passive CMOS' sensors. A detailed study with respect to crucial sensor parameters, such as bulk resistivity (> 2 kOhm-cm), capacitance (105 fF), and detection efficiency (99 %) reveals similar performance to current ATLAS planar-silicon sensors. Additionally, resistor biasing of pixels, a feature available in the CMOS process, enhances the detection efficiency by approximately 1 %. Driven by these promising results, the option to use passive CMOS sensors for the future ATLAS pixel detector is actively pursued

A method for precise charge reconstruction with pixel detectors using binary hit information

A method is presented to precisely reconstruct charge spectra with pixel detectors using binary hit information of individual pixels. The method is independent of the charge information provided by the readout circuitry and has a resolution mainly limited by the electronic noise. It relies on the ability to change the detection threshold in small steps while counting hits from a particle source. The errors are addressed and the performance of the method is shown based on measurements with the ATLAS pixel chip FE-I4 bump bonded to a 230 {\mu}m 3D-silicon sensor. Charge spectra from radioactive sources and from electron beams are presented serving as examples. It is demonstrated that a charge resolution ({\sigma}<200 e) close to the electronic noise of the ATLAS FE-I4 pixel chip can be achieved

Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work

Neutron irradiation test of depleted CMOS pixel detector prototypes

Charge collection properties of depleted CMOS pixel detector prototypes produced on p-type substrate of 2 k$\Omega$cm initial resistivity (by LFoundry 150 nm process) were studied using Edge-TCT method before and after neutron irradiation. The test structures were produced for investigation of CMOS technology in tracking detectors for experiments at HL-LHC upgrade. Measurements were made with passive detector structures in which current pulses induced on charge collecting electrodes could be directly observed. Thickness of depleted layer was estimated and studied as function of neutron irradiation fluence. An increase of depletion thickness was observed after first two irradiation steps to 1$\cdot$10$^{13}$ n/cm$^{2}$ and 5$\cdot$10$^{13}$ n/cm$^{2}$ and attributed to initial acceptor removal. At higher fluences the depletion thickness at given voltage decreases with increasing fluence because of radiation induced defects contributing to the effective space charge concentration. The behaviour is consistent with that of high resistivity silicon used for standard particle detectors. The measured thickness of the depleted layer after irradiation with 1$\cdot$10$^{15}$ n/cm$^{2}$ is more than 50 $\mu$m at 100 V bias. This is sufficient to guarantee satisfactory signal/noise performance on outer layers of pixel trackers in HL-LHC experiments

BDAQ53, a versatile pixel detector readout and test system for the ATLAS and CMS HL-LHC upgrades

BDAQ53 is a readout system and verification framework for hybrid pixel detector readout chips of the RD53 family. These chips are designed for the upgrade of the inner tracking detectors of the ATLAS and CMS experiments. BDAQ53 is used in applications where versatility and rapid customization are required, such as in laboratory testing environments, test beam campaigns, and permanent setups for quality control measurements. It consists of custom and commercial hardware, a Python-based software framework, and FPGA firmware. BDAQ53 is developed as open source software with both software and firmware being hosted in a public repository.Comment: 6 pages, 6 figure

Characterization of passive CMOS sensors with RD53A pixel modules

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 μm$^{2}$ cell geometry

Characterization of passive CMOS sensors with RD53A pixel modules

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 μm$^{2}$ cell geometry

3D active edge silicon sensors: Device processing, yield and QA for the ATLAS-IBL production

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