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22 research outputs found

A novel systolic architecture for an efficient RSA implementation

Author: Moshopoulos NK
Pekmestzi KZ
Publication venue: 'Springer Science and Business Media LLC'
Publication date: 01/01/2001
Field of study

Complex number multipliers

Author: Pekmestzi KZ
Publication venue
Publication date: 01/01/1989
Field of study

Multiplexer-based array multipliers

Author: Pekmestzi KZ
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date: 01/01/1999
Field of study

A systolic, high speed architecture for an RSA cryptosystem

Author: Moshopoulos NK
Pekmestzi KZ
Publication venue: 'Springer Science and Business Media LLC'
Publication date: 01/01/2002
Field of study

Low-latency bit-parallel systolic multiplier

Author: Caraiscos C
Pekmestzi KZ
Publication venue: 'Institution of Engineering and Technology (IET)'
Publication date: 01/01/1993
Field of study

A bit-interleaved systolic architecture for a high-speed RSA system

Author: Moshopoulos NK
Pekmestzi KZ
Publication venue: 'Elsevier BV'
Publication date: 01/01/2001
Field of study

Low-Latency bit-Parallel systolic VLSI implementation of FIR digital filters

Author: Caraiscos CG
Pekmestzi KZ
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date: 01/01/1996
Field of study

Implementation of systolic multipliers and digital filters via signal flow-graph transformations

Author: Caraiscos CG
Pekmestzi KZ
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date: 01/01/1994
Field of study

Systolic frequency dividers/counters

Author: Pekmestzi KZ
Thanasouras N
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date: 01/01/1994
Field of study

Constant number serial pipeline multipliers

Author: Kalivas P
Pekmestzi KZ
Publication venue: 'Springer Science and Business Media LLC'
Publication date: 01/01/2000
Field of study

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