Optical signal processing in InP photonic integrated circuits

\u3cp\u3eSignal processing in photonic integration requires radical change in component density and wiring complexity. Single- and multi-plane InP photonics are researched for fast pulse processing (analog capability) and Tb/s routing (digital capability).\u3c/p\u3

Relaxed dimensional tolerance whispering gallery microbends

A new class of highly compact photonic microbend exploiting whispering gallery propagation is analyzed. Critical design dimensions are relaxed by using multimode waveguiding. A small outer sidewall radius enables tight arbitrary angle of rotation for the guided light, and the inner radius is reduced beyond the caustic radius to minimize the impact of the microbend dimensions on losses. Whispering gallery operation is compared with single-mode microbend operation using a combination of full-vectorial wave-equation models and 2-D and 3-D finite-difference time domain models. The dependence of loss on fabricated dimension is shown to be reduced by an order of magnitude. Waveguide width variations of ±100 nm lead to loss variations of only ±0.01 dB in the whispering gallery regime, contrasting favorably with ±0.10 dB loss variations for the single-mode regime for a 20 µm radius and for 1.5 µm input waveguide widths. Smaller radius microbends show comparable trends albeit with higher losses and increased sensitivity to width variations. The sensitivity of microbend loss to small changes in narrow waveguide width is attributed to the excitation of a restricted mode group. Moving the inner sidewall beyond the caustic radius allows relaxed tolerance light propagation in the whispering gallery regime. Losses down to 0.2 dB/180° and polarization conversion of down to -25 dB/180 are predicted

Optical power meter co-integrated with a fast optical switch for on-chip OSNR monitoring

We demonstrate an OSNR meter co-integrated with a photonic integrated switch for on-chip measurement. A scheme for on-chip electronic calibration is proposed using switch gates as detectors. Integrated photocurrent measurements are performed for noise and signal using an on-chip cyclic router and gates in combination with multi-channel electronic integrators to demonstrate an OSNR dynamic range extending from 6 to 40 dB/0.1nm

InP photonic circuit for deep neural networks

\u3cp\u3eWe perform weight addition of four 10 Gbit/s channels employing a photonic integrated indium phosphide chip based on semiconductor optical amplifiers technology. We demonstrate classification of classes of Iris flowers with an accuracy of 91.6%.\u3c/p\u3

Image classification with a 3-Layer SOA-based photonic integrated neural network

\u3cp\u3eWe demonstrate for the first time Iris flowers classification by implementing a trained 3-layer neural network with an SOA-based InP cross-connect chip. Classification accuracy of 85.8% is achieved, 9.2% lower than what obtained via a computer.\u3c/p\u3

SOA-based photonic integrated deep neural networks for image classification

\u3cp\u3eWe successfully demonstrate classification of three classes of Iris flowers by implementing a trained neural network on an SOA-based InP cross-connect chip. Classification accuracy of 91.6% is achieved after a fine optimization procedure.\u3c/p\u3

Numerical simulation of an InP photonic integrated cross-connect for deep neural networks on chip

We propose a novel photonic accelerator architecture based on a broadcast-and-weight approach for a deep neural network through a photonic integrated cross-connect. The single neuron and the complete neural network operation are numerically simulated. The weight calibration and weighted addition are reproduced and demonstrated to behave as in the experimental measurements. A dynamic range higher than 25 dB is predicted, in line with the measurements. The weighted addition operation is also simulated and analyzed as a function of the optical crosstalk and the number of input colors involved. In particular, while an increase in optical crosstalk negatively influences the simulated error, a greater number of channels results in better performance. The iris flower classification problem is solved by implementing the weight matrix of a trained three-layer deep neural network. The performance of the corresponding photonic implementation is numerically investigated by tuning the optical crosstalk and waveguide loss, in order to anticipate energy consumption per operation. The analysis of the prediction error as a function of the optical crosstalk per layer suggests that the first layer is essential to the final accuracy. The ultimate accuracy shows a quasi-linear dependence between the prediction accuracy and the errors per layer for a normalized root mean square error lower than 0.09, suggesting that there is a maximum level of error permitted at the first layer for guaranteeing a final accuracy higher than 89%. However, it is still possible to find good local minima even for an error higher than 0.09, due to the stochastic nature of the network we are analyzing. Lower levels of path losses allow for half the power consumption at the matrix multiplication unit, for the same error level, offering opportunities for further improved performance. The good agreement between the simulations and the experiments offers a solid base for studying the scalability of this kind of network

Deep neural network through an InP SOA-based photonic integrated cross-connect

Photonic neuromorphic computing is raising a growing interest as it promises to provide massive parallelism and low power consumption. In this paper, we demonstrate for the first time a feed-forward neural network via an 8 × 8 Indium Phosphide cross-connect chip, where up to 8 on-chip weighted addition circuits are co-integrated, based on semiconductor optical amplifier technology. We perform the weight calibration per neuron, resulting in a normalized root mean square error smaller than 0.08 and a best case dynamic range of 27 dB. The 4 input to 1 output weighted addition operation is executed on-chip and is part of a neuron, whose non-linear function is implemented via software. A three feedback loop optimization procedure is demonstrated to enable an output neuron accuracy improvement of up to 55%. The exploitation of this technology as neural network is evaluated by implementing a trained 3-layer photonic deep neural network to solve the Iris flower classification problem. Prediction accuracy of 85.8% is achieved, with respect to the 95% accuracy obtained via a computer. A comprehensive analysis of the error evolution in our system reveals that the electrical/optical conversions dominate the error contribution, which suggests that an all optical approach is preferable for future neuromorphic computing hardware design

Low-to-high refractive index contrast transition (RICT) device for low loss polymer-based optical coupling

\u3cp\u3eWe propose for the first time a coupling device concept for passive low-loss optical coupling, which is compatible with the 'generic' indium phosphide (InP) multi-project-wafer manufacturing. A low-to-high vertical refractive index contrast transition InP waveguide is designed and tapered down to adiabatically couple light into a top polymer waveguide. The on-chip embedded polymer waveguide is engineered at the chip facets for offering refractive-index and spot-size-matching to silica fiber-arrays. Numerical analysis shows that coupling losses lower than 1.5 dB can be achieved for a TE-polarized light between the InP waveguide and the on-chip embedded polymer waveguide at 1550 nm wavelength. The performance is mainly limited by the difficulty to control single-mode operation. However, coupling losses lower than 1.9 dB can be achieved for a bandwidth as large as 200 nm. Moreover, the foreseen fabrication process steps are indicated, which are compatible with the 'generic' InP multi-project-wafer manufacturing. A fabrication error tolerance study is performed, indicating that fabrication errors occur only in 0.25 dB worst case excess losses, as long as high precision lithography is used. The obtained results are promising and may open the route to large port counts and cheap packaging of InP-based photonic integrated chips.\u3c/p\u3