COPLANAR PCB77 AND ANGII INDUCED VASCULAR DISORDERS

Previous studies demonstrated that coplanar PCBs promote inflammation by release of pro-inflammatory cytokines like TNF, MCP-1, and VCAM-1 from endothelial cells as well as adipocytes. Also these PCBs at small doses may contribute to the development of obesity by inducing adipocyte differentiation. Obesity is a known risk factor that promotes cardiovascular disorders like atherosclerosis and AAAs. Evidence shows Ang II, a component of the RAS, leads to the formation of atherosclerosis and AAAs in both normal as well as hyperlipidemic mice. Earlier studies in our laboratory have also shown that coplanar PCB-77 promotes atherosclerotic lesion formation in ApoE-/- mice. The purpose of this study was to define the effects of PCB77 on Ang II induced vascular diseases like atherosclerosis and AAAs. Two different hyperlipidemic mouse models, which require different diets to get atherosclerosis, the ApoE deficient mice (ApoE-/-) requiring the normal mouse diet (Chow diet) and the Low Density Lipoprotein Receptor deficient mice (LDLr-/-) requiring the Western diet, were used for this study as both are susceptible to Ang II induced vascular disorders. The timing of PCB administration was also studied in LDLr-/- mice to see the profound effects of PCB77 on atherosclerosis and AAAs

The Next Generation of Internetworking

This paper describes a research effort concerned with the design of the next generation of internet architecture, which has been necessitated by two emerging trends. First, there will be at least a few orders of magnitude increase in data rates of communication networks in the next few years. For example, researchers are already prototyping networks with data rates of up to a few hundred Mbps, and are planning networks with data rates up to a few Gbps. Second, researchers from all disciplines of science, engineering, and humanities plan to use the communication infrastructure to access widely distributed resources in order to solve bigger and more complex problems. These trends provide new challenges and opportunities to researchers in the communication field. One such challenge is the design of what we call the very high speed internet (VHSI) abstraction which can help efficiently support guaranteed levels of performance for a variety of applications, and can cope with the ever increasing diversity of underlying networks with rapidly growing user population and needs. Our strategy towards achieving this ambitious goal comprises the following: • Design, specification, and prototype implementation of novel multipoint congram-oriented service that can work well with connection-oriented and datagram high speed networks, can provide variable grade service on a need basis to its applications, and can provide adequate reconfigurability to deal with survivability requirements due to network failures. • Design and implementation of gateway architecture than can support data rates of a few hundred Mbps, can interface with diverse networks, and can implement the congram-oriented service without becoming a performance bottleneck. • Development of analytical and simulation models to evaluate important tradeoffs associated with the design of a congram-oriented protocol, the resource management on diverse networks, and the design of new gateway architectures

A Two-Level Flow Control Scheme for High Speed Networks

Many new network applications demand interprocess communication (IPC) services with guaranteed bandwidth, delay, and low. Existing transport protocol mechanisms have not been designed with these service objectives. Large bandwidth-delay products of high-speed networks also render the existing flow control mechanism inefficient. This paper presents the design, evaluation, and implementation of a two-level flow control scheme that can support efficient IPC for these applications in high-speed network environments

An Application-Oriented Error Control Scheme for High Speed Networks

Many new network applications demand interprocess communication (IPC) services that are not supported by existing transport network protocol mechanisms. Large bandwidth-delay products of high-speed networks also render the existing error control mechanism inefficient. This paper presents the design, evaluation, and implementations of an application-oriented error control scheme that can support efficient IPC for these applications in high-speed network environments

An Application-Oriented Error Control Scheme for High Speed Networks

Many new network applications demand interprocess communication (IPC) services that are not supported by existing transport protocol mechanisms. Large bandwidth-delay products of high-speed networks also render the existing control mechanisms such as flow and error control less efficient. In particular, new error control schemes that can provide variable degrees of error recovery according to the applications requirements are needed. This paper presents the design, evaluation, and implementation of an application-oriented error control scheme that is aimed at supporting efficient IPC in high-speed networking environments. Our results show that the proposed error control scheme allows effective control of trade-off between the amount of error an application can tolerate and the amount of delay it suffers

Efficient Quality of Service Support in Multimedia Computer Operating Systems

This report describes our approach towards providing quality of service (QoS) guarantees for network communication within the endsystems to support multimedia applications. We first address the problem of QoS specification by identifying a set of application classes and their QoS parameters that cover the communication requirements of most applications. We then describe the QoS mapping problem, and show how requirements for resources (such as the CPU, the network interface adaptor and network connections) can be automatically derived from the application QoS parameters. We then deal with the QoS enforcement issue in which we describe techniques for scheduling protocol processing threads in order to reduce context switching overhead, as well as derive sufficiency conditions in order to provide predictable performance. We integrate all these solutions in a protocol implementation model. The key feature of the model is that protocols are part of the application process and are processed using protocol threads with individual scheduling attributes derived using our QoS mapping method. We propose several performance improvement techniques for application level protocol implementations that can reduce the high cost of data movement and context switching in these implementations. A significant component of this work will consist of implementation and experimentation which will result in significant contributions of practical utility

Design of an ATM-FDDI Gateway

Asynchronous transfer mode (ATM) networks are capable of supporting a wide variety of applications with varying data rates. FDDI networks offer to support similar applications in the LAN environment. Both these networks are characterized by high data rates, low error rates, and are capable of providing performance guarantees. In this paper we present the design of an ATM-FDDI gateway that can provide high performance internetworking between these two important classes of networks. An important part of the gateway design philosophy is to partition the functionality into critical and non-critical paths. The critical path consists of per packet processing and is implemented in hardware. The non-critical path consists of connection, resource, and route management, and is implemented in software

An Overview of Segment Streaming for Efficient Pipelined Televisualization

The importance of scientific visualization for both science and engineering endeavors has been well recognized. Televisualization becomes necessary because of the physical distribution of data, computation resources, and users invovled in the visualization process. However, televisualization is not adequately supported by existing communication protocols. We believe that a pielined televisualization model (PTV) is suitable for efficient implementation of most visualization applications. In order to support this model over high speed networks, we are developing a segment streaming interprocess communication (IPC) mechanism within the Axon communication architecture. Important aspects of this development include: the segment streaming paradigm which supports low-overhead communication as well as concurrency between the communication and local computation; a two-level flow control method for distributed pipeline synchronization; and an application-oriented error control method which allows error control to be optimized for different applications. This paper describes a set of ideas that lead to the design of this IPC mechanism

Distributed Data Layout, Scheduling and Playout Control in a Large Scale Multimedia Storage Server

this paper, we will consider only a retrieval environment and primarily focus on the strong interaction between the architecture, data layout, data compression, and scheduling. In particular, we will present distributed multilevel data layout, scheduling and playout control schemes developed in conjunction with our architecture. These schemes allow all clients to access the same data without data replication and support both buffered as well as bufferless clients. Also, they provide strict Large Scale Multimedia Servers 2 deterministic guarantees to each active client during normal playout as well as a full spectrum of interactive stream control operations (namely, fast forward, rewind, frame advance, slow play, slow rewind, pause, stop-and-return and stop). Our implementation of the stream control operations requires no extra bandwidth reservation and provides acceptable operation latency of a few hundread milliseconds. The rest of this paper is organized as follows: Various service models that are possible for a ondemand multimedia server are illustrated in Section 2. The basics of our prototype implementation of a large scale server are presented in Section 3. Section 4 describes the distributed and hierarchical data layout scheme. Next, our basic multilevel scheduling scheme is illustrated in Section 5. Various ways of implementing playout control operations and their implications on scheduling are described in Section 6. This section also presents modifications that must be made in the basic scheduling scheme to achieve smooth transition between normal playout and operations such as ff and rw