Fast physical models for Si LDMOS power transistor characterization

A new nonlinear, process-oriented, quasi-two-dimensional (Q2D) model is described for microwave laterally diffused MOS (LDMOS) power transistors. A set of one-dimensional energy transport equations are solved across a two-dimensional cross-section in a “current-driven” form. The model accounts for avalanche breakdown and gate conduction, and accurately predicts DC and microwave characteristics at execution speeds sufficiently fast for circuit simulation applications

A nonlinear electro-thermal model for high power RF LDMOS transistors

A new nonlinear, charge-conservative, dynamic electro-thermal compact model for LDMOS RF power transistors is described in this paper. The transistor is characterized using pulsed I-V and S-parameter measurements, to ensure isothermal conditions. The intrinsic model current and charge sources are obtained by integration of the real and imaginary components, respectively, of the small-signal Y-parameters: this yields a charge-conservative model by design. A thermal sub-circuit is used to introduce dynamic thermal dependence, and thermal threshold voltage shift is built in. DC and large-signal validation of the model is presented. © 2008 IEEE

Process-orientated physics-based modeling of microwave power transistors: Small- and large-signal characterization

The coupling between charge transport, heat and energy flow required to model high frequency power devices is developed in the context of a computationally efficient physics-based model, which has been successfully applied to microwave laterally diffused MOS transistors. The accurate prediction of small-and large-signal microwave characteristics, and the physical insight gained, can be used in the process-orientated optimization and process sensitivity analysis of LDMOS power FETs. The charge-based model is well-suited to non-linear CAD implementation for applications such as power amplifier design. © 2012 IEEE

An extrinsic component parameter extraction method for high power RF LDMOS transistors

A new extrinsic network and extrinsic parameter extraction methodology is developed for high power RF LDMOS transistor modeling. This new method uses accurate manifold deembedding using electromagnetic simulation, and optimization of the extrinsic network parameter values over a broad frequency range. The new extrinsic network accommodates feedback effects which are observed in high power transistors. This improved methodology allows us to achieve a good agreement between measured and modeled S-parameters in the frequency range of 0.5 to 6 GHz for different bias conditions. Large-signal verification of this new model shows a very good match with measurements at 2.14 GHz. © 2008 IEEE

Removal of measurement artifacts present in high-power RF transistor loadpull test-fixtures

In this paper we investigate the effect of a discontinuity, at the measurement reference plane, on loadpull measurements of high-power RF transistors. The discontinuity is created by transition from the microstrip transformers on the printed-circuit board of the test-fixture to the packaged transistor. Our measurements indicate that the discontinuity does not change the peak performance of a packaged transistor but it can significantly alter the impedances at which this performance occurs. Through a straight-forward electromagnetic simulation we are able to characterize the discontinuity and remove it from measurement. © 2013 IEEE

Modeling techniques suitable for CAD-based design of internal matching networks of high-power RF/microwave transistors

A scalable and accurate simulation technique to be used for the computer-aided design (CAD) of matching networks employed within high-power RF transistors is presented. A novel measurement methodology is developed and utilized during the validation of the proposed analysis approach. Appropriate segmentation techniques were developed, which are consistent with the design approach of the high-power transistor, that take into account the overall complexity of the internal match of most modern RF high-power transistors, while preserving important electromagnetic interactions. By being able to properly decouple the linear portion of the overall packaged transistor model, an objective accuracy assessment via the comparison of measured versus simulated results of the internal matching network was accomplished. The level of accuracy obtained provides credence to the idea of a full CAD-driven design process of the internal match of high-power RF transistors. © 2006 IEEE

On the development of CAD techniques suitable for the design of high-power RF transistors

A full-wave modeling procedure was developed to simulate the package, bonding wires, and MOS capacitors used in the design of matching networks found within RF/microwave power transistors. The complex packaging environment was segmented into its constituent components and simulation techniques were developed for each component, as well as the inter-element coupling. An S-parameter test fixture and package was developed that permits measurements of these types of devices. The simulation and measurement procedures were used to model various circuits. Measured S-parameters and those obtained using the full-wave methodology were in good agreement. Simulation results using an inductance-only bonding-wire model were performed and differences between the S-parameters were observed. A detailed examination of the loss introduced by the matching network was performed and simulations and measurements matched closely. © 2005 IEEE