156 research outputs found

    Design, Process, and Reliability of Wafer Level Packaging

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    Preface : Materials and Technologies for 3-D Integration - 2008 MRS Fall Meeting; Boston, MA; 1 December 2008 through 3 December 2008

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    3-dimensional integration (3D IC) is a system level architecture/technology wherein multiple layers of planar devices are stacked and vertically interconnected through the silicon substrate (or other semiconductor material) in the Z direction as shown in Figure 1

    Chips go upscale

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    New Convenient Synthetic Route for Photosensitive Poly(benzoxazole)

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