Author Correction:In-plane selective area InSb–Al nanowire quantum networks (Communications Physics, (2020), 3, 1, (59), 10.1038/s42005-020-0324-4)

The Data availability statement of this article has been modified to add the accession link to the raw data. The old Data availability statement read “Materials and data that support the findings of this research are available within the paper. All data are available from the corresponding author upon request”. This has been replaced by “Materials and data that support the findings of this research are available within the paper. The raw data have been deposited at https://zenodo.org/record/4589484#.YEoEOy1Y7Sd”. This has been corrected in both the HTML and PDF version of the article.</p

Universal Platform for Scalable Semiconductor-Superconductor Nanowire Networks

Semiconductor-superconductor hybrids are commonly used in research on topological quantum computation. Traditionally, top-down approaches involving dry or wet etching are used to define the device geometry. These often aggressive processes risk causing damage to material surfaces, giving rise to scattering sites particularly problematic for quantum applications. Here, a method that maintains the flexibility and scalability of selective area grown nanowire networks while omitting the necessity of etching to create hybrid segments is proposed. Instead, it takes advantage of directional growth methods and uses bottom-up grown indium phosphide (InP) structures as shadowing objects to obtain selective metal deposition. The ability to lithographically define the position and area of these objects and to grow a predefined height ensures precise control of the shadowed region. The approach by growing indium antimonide nanowire networks with well-defined aluminium and lead (Pb) islands is demonstrated. Cross-section cuts of the nanowires reveal a sharp, oxide-free interface between semiconductor and superconductor. By growing InP structures on both sides of in-plane nanowires, a combination of platinum and Pb can independently be shadow deposited, enabling a scalable and reproducible in situ device fabrication. The semiconductor-superconductor nanostructures resulting from this approach are at the forefront of material development for Majorana based experiments

Merging Nanowires and Formation Dynamics of Bottom-Up Grown InSb Nanoflakes

Indium Antimonide (InSb) is a semiconductor material with unique properties, that are suitable for studying new quantum phenomena in hybrid semiconductor-superconductor devices. The realization of such devices with defect-free InSb thin films is challenging, since InSb has a large lattice mismatch with most common insulating substrates. Here, the controlled synthesis of free-standing 2D InSb nanostructures, termed as “nanoflakes”, on a highly mismatched substrate is presented. The nanoflakes originate from the merging of pairs of InSb nanowires grown in V-groove incisions, each from a slanted and opposing {111}B facet. The relative orientation of the two nanowires within a pair, governs the nanoflake morphologies, exhibiting three distinct ones related to different grain boundary arrangements: no boundary (type-I), Σ3- (type-II), and Σ9-boundary (type-III). Low-temperature transport measurements indicate that type-III nanoflakes are of a relatively lower quality compared to type-I and type-II, based on field-effect mobility. Moreover, type-III nanoflakes exhibit a conductance dip attributed to an energy barrier pertaining to the Σ9-boundary. Type-I and type-II nanoflakes exhibit promising transport properties, suitable for quantum devices. This platform hosting nanoflakes next to nanowires and nanowire networks can be used to selectively deposit the superconductor by inter-shadowing, yielding InSb-superconductor hybrid devices with minimal post-fabrication steps

Crossed Andreev Reflection in InSb flake Josephson Junctions

Data collection and code examples for plotting the figures of the manuscript entitled: Crossed Andreev Reflection in InSb Flake Josephson Junctions

Parity transitions in the superconducting ground state of hybrid InSb-Al Coulomb islands

The number of electrons in small metallic or semiconducting islands is quantised. When tunnelling is enabled via opaque barriers this number can change by an integer. In superconductors the addition is in units of two electron charges (2e), reflecting that the Cooper pair condensate must have an even parity. This ground state (GS) is foundational for all superconducting qubit devices. Here, we study a hybrid superconducting-semiconducting island and find three typical GS evolutions in a parallel magnetic field: a robust 2e-periodic even-parity GS, a transition to a 2e-periodic odd-parity GS, and a transition from a 2e- to a 1e-periodic GS. The 2e-periodic odd-parity GS persistent in gate-voltage occurs when a spin-resolved subgap state crosses zero energy. For our 1e-periodic GSs we explicitly show the origin being a single zero-energy state gapped from the continuum, i.e., compatible with an Andreev bound states stabilized at zero energy or the presence of Majorana zero modes.QRD/Kouwenhoven LabApplied SciencesQRD/Geresdi LabQN/Bakkers La

Universal Platform for Scalable Semiconductor-Superconductor Nanowire Networks

Raw data to the paper "Universal Platform for Scalable Semiconductor-Superconductor Nanowire Networks"

A full parity phase diagram of a Majorana island: Data and Code

This repository gathers the data analysis and plotting code required to reproduce the results of our work "A full parity phase diagram of a Majorana island"

A full parity phase diagram of a Majorana island: Data and Code

This repository gathers the data analysis and plotting code required to reproduce the results of our work "A full parity phase diagram of a Majorana island"

In-plane selective area InSb–Al nanowire quantum networks

Strong spin–orbit semiconductor nanowires coupled to a superconductor are predicted to host Majorana zero modes. Exchange (braiding) operations of Majorana modes form the logical gates of a topological quantum computer and require a network of nanowires. Here, we utilize an in-plane selective area growth technique for InSb–Al semiconductor–superconductor nanowire networks. Transport channels, free from extended defects, in InSb nanowire networks are realized on insulating, but heavily mismatched InP (111)B substrates by full relaxation of the lattice mismatch at the nanowire/substrate interface and nucleation of a complete network from a single nucleation site by optimizing the surface diffusion length of the adatoms. Essential quantum transport phenomena for topological quantum computing are demonstrated in these structures including phase-coherence lengths exceeding several micrometers with Aharonov–Bohm oscillations up to five harmonics and a hard superconducting gap accompanied by 2e-periodic Coulomb oscillations with an Al-based Cooper pair island integrated in the nanowire network

A full parity phase diagram of a proximitized nanowire island: Data and Code

This repository gathers the data analysis and plotting code required to reproduce the results of our work "A full parity phase diagram of a proximitized nanowire island"