Effects of Thermal Treatments on the Trapping Properties of HfO2 Films for Charge Trap Memories

The charge trapping properties of HfO2 thin films for application in charge trap memories are investigated as a function of high-temperature postdeposition annealing (PDA) and oxide thickness in the TaN/Al2O3/HfO2/SiO2/Si structure. The trap density (NT) in HfO2, extracted by simulating the programming transient, is in the 1019-1020 cm(-3) range, and it is related to film thickness and PDA temperature. Diffusion phenomena in the stack play a significant role in modifying NT in HfO2 and the insulating properties of the Al2O3 layer. The memory performances for 1030 degrees C PDA are promising with respect to standard stacks featuring Si3N4. (C) 2012 The Japan Society of Applied Physic

Performance comparison for FinFETs, nanowire and stacked nanowires FETs: Focus on the influence of surface roughness and thermal effects

We perform a comprehensive comparison of FinFETs, stacked nanowires (stacked NWs), circular and square gate-all-around (GAA) -FETs with same footprint, by using an in-house deterministic BTE solver accounting for quantum confinement, a wide set of scattering mechanisms and self-heating. We show that an increase in surface roughness (SR) can frustrate the improvement in on current, I, that for high-quality interfaces we observe in stacked NWs compared to FinFETs. Simulations suggest that SR also influences whether or not In0.53Ga0.47As can provide better I than strained silicon (sSi)

Benchmarking of 3-D MOSFET Architectures: Focus on the Impact of Surface Roughness and Self-Heating

Tremendous improvements in the fabrication technology have allowed to scale the physical dimensions of the transistors and also to develop different promising 3-D architectures that may allow continuing Moore\u2019s law. In this paper, we perform a comparative delay analysis of different 3-D device architectures and study the impact of surface roughness and self-heating on the on-current using a comprehensive in-house simulation framework comprising Schr\uf6dinger, Poisson, and Boltzmann transport equation solvers and comprising relevant scattering mechanisms and self-heating. Our results highlight that parasitic capacitance can alter the relative ranking of the architectures from delay point of view. We demonstrate that surface roughness can cause architectureand material-dependentcurrent degradation, and hence, it is necessary to account for it in simulation-based benchmarking different architectures

Dependable Contact Related Parameter Extraction in Graphene\u2013Metal Junctions

The accurate extraction and the reliable, repeatable reduction of graphene\u2013metal contact resistance (RC) are still open issues in graphene technology. Here, the importance of following clear protocols when extracting RC using the transfer length method (TLM) is demonstrated. The example of back-gated graphene TLM structures with nickel contacts, a complementary metal oxide semiconductor compatible metal, is used here. The accurate extraction of RC is significantly affected by generally observable Dirac voltage shifts with increasing channel lengths in ambient conditions. RC is generally a function of the carrier density in graphene. Hence, the position of the Fermi level and the gate voltage impact the extraction of RC. Measurements in high vacuum, on the other hand, result in dependable extraction of RC as a function of gate voltage owing to minimal spread in Dirac voltages. The accurate measurement and extraction of important parameters like contact-end resistance, transfer length, sheet resistance of graphene under the metal contact, and specific contact resistivity as a function of the back-gate voltage is further assessed. The presented methodology has also been applied to devices with gold and copper contacts, with similar conclusions

Sex-specific predictors of left ventricular diastolic dysfunction in untreated hypertension

Joanna Jaroch,1 Olga Vriz,2 Zbigniew Bociąga,1 Caterina Driussi,2 Maria Łoboz-Rudnicka,1 Barbara Rzyczkowska,1 Krystyna Łoboz-Grudzień1,3 1Department of Cardiology, T Marciniak Hospital, Wroclaw, Poland; 2Division of Cardiology, San Antonio Hospital, San Daniele del Friuli, Udine, Italy; 3Health Science Faculty, Wroclaw Medical University, Wroclaw, PolandBackground: Little is known about the sex-specific differences in left ventricular (LV) diastolic dysfunction (DD) predictors. We hypothesized that arterial stiffness (AS) may play a different role in the etiology of LV DD in hypertensive men and postmenopausal women, acting independently from other established predictors of this condition, such as age, obesity, diabetes mellitus, LV remodeling, and systolic function.Objectives: The aim of the study was to analyze the sex-specific differences in AS and other predictors of LV DD in men and postmenopausal women with untreated hypertension (HTN).Patients and methods: The study included 144 patients (63 postmenopausal women and 81 men, mean age 62.7±6.7 years) with previously untreated HTN and no history of cardiovascular diseases. All patients were subjected to detailed echocardiography, vascular ultrasound, and high-resolution echotracking (eTracking) of carotid arteries.Results: In the multivariate analysis, concomitant diabetes mellitus turned out to be an independent predictor of LV DD in women (P=0.02). In turn, two independent predictors of LV DD have been identified in men: S'-tissue Doppler-derived peak LV longitudinal systolic shortening velocity (P=0.001) and β, beta stiffness index (P=0.004).Conclusion: There are sex differences in the predictors of LV DD in untreated HTN. In postmenopausal women, LV DD is mostly determined by diabetes, while in men, it is determined by S', reflecting LV systolic longitudinal function, and β, a parameter of AS. Keywords: sex differences, left ventricular diastolic dysfunction, hypertensio