An Evaluation of Risk Attitudes and Risk Tolerance in Emergency Medicine Residents

An underlying issue to our current healthcare system is how decisions made in the emergency department affect patients. This is paramount for underserved populations, which are more likely to have poor physical and mental health, lack of primary care, greater use of health services, and be generally dissatisfied with their medical care.1,2 What should the emergency physician (EP) do for these patients? These decisions are largely based upon individual risk tolerance. While risk is a indelible part of emergency medicine (EM), a risk profile of EM residents has not been compiled. Knowledge of risk taking tendencies among this niche of medical professionals could be critical. If EM residents have great risk aversion, they might practice defensive medicine, thereby incurring crippling costs4. On the other hand, if emergency medicine residents are greatly risk tolerant, they may make decisions that lead to significant morbidity and mortality. It is essential to establish a baseline risk profile before any corrective measures can be advanced. This study attempted to accomplish precisely that using Risk Type CompassTM.https://jdc.jefferson.edu/cwicposters/1023/thumbnail.jp

Advantages of versatile neural-network decoding for topological codes

Finding optimal correction of errors in generic stabilizer codes is a computationally hard problem, even for simple noise models. While this task can be simplified for codes with some structure, such as topological stabilizer codes, developing good and efficient decoders still remains a challenge. In our work, we systematically study a very versatile class of decoders based on feedforward neural networks. To demonstrate adaptability, we apply neural decoders to the triangular color and toric codes under various noise models with realistic features, such as spatially-correlated errors. We report that neural decoders provide significant improvement over leading efficient decoders in terms of the error-correction threshold. Using neural networks simplifies the process of designing well-performing decoders, and does not require prior knowledge of the underlying noise model.Comment: 11 pages, 6 figures, 2 table

Evaluation of temperature-performance trade-offs in wireless network-on-chip architectures

Continued scaling of device geometries according to Moore\u27s Law is enabling complete end-user systems on a single chip. Massive multicore processors are enablers for many information and communication technology (ICT) innovations spanning various domains, including healthcare, defense, and entertainment. In the design of high-performance massive multicore chips, power and heat are dominant constraints. Temperature hotspots witnessed in multicore systems exacerbate the problem of reliability in deep submicron technologies. Hence, there is a great need to explore holistic power and thermal optimization and management strategies for the massive multicore chips. High power consumption not only raises chip temperature and cooling cost, but also decreases chip reliability and performance. Thus, addressing thermal concerns at different stages of the design and operation is critical to the success of future generation systems. The performance of a multicore chip is also influenced by its overall communication infrastructure, which is predominantly a Network-on-Chip (NoC). The existing method of implementing a NoC with planar metal interconnects is deficient due to high latency, significant power consumption, and temperature hotspots arising out of long, multi-hop wireline links used in data exchange. On-chip wireless networks are envisioned as an enabling technology to design low power and high bandwidth massive multicore architectures. However, optimizing wireless NoCs for best performance does not necessarily guarantee a thermally optimal interconnection architecture. The wireless links being highly efficient attract very high traffic densities which in turn results in temperature hotspots. Therefore, while the wireless links result in better performance and energy-efficiency, they can also cause temperature hotspots and undermine the reliability of the system. Consequently, the location and utilization of the wireless links is an important factor in thermal optimization of high performance wireless Networks-on-Chip. Architectural innovation in conjunction with suitable power and thermal management strategies is the key for designing high performance yet energy-efficient massive multicore chips. This work contributes to exploration of various the design methodologies for establishing wireless NoC architectures that achieve the best trade-offs between temperature, performance and energy-efficiency. It further demonstrates that incorporating Dynamic Thermal Management (DTM) on a multicore chip designed with such temperature and performance optimized Wireless Network-on-Chip architectures improves thermal profile while simultaneously providing lower latency and reduced network energy dissipation compared to its conventional counterparts