A Fast Timing Separation of Events Algorithm for Concurrent Systems

In this work, we present a fast, polynomial time implementation of the Timing Separation of Events (TSE) Algorithm, with complexity O(E × (V+E). TSE computation is a fundamental problem in the analysis of event-driven, asynchronous systems, when uncertainty is present, and event delays are specified as [min, max] intervals. The maximum or minimum TSE may be needed, based on the timing analysis required. In this work, we present a novel approach to solving the TSE computation problem, which utilises: (1) the Primal-Dual Method Algorithm of [1] to compute the system period and critical cycle, as well as annotate timing offsets to events, based on the minimum delay values, and (2) an unfolding scheme, on the event graph, to compute the maximum delay between source and target. We show that only a maximum of three unfoldings are necessary, based on the relative delays between source and target events. We present results on a set of classical TSE examples. Our results are correct and identical to [2], but our approach resolves the issue of deciding how many unfoldings are needed to achieve periodic behaviour, and is sianificantly faster than all other methods. © 2019 IEEE

Graph-based STA for asynchronous controllers

We present a Graph-based Asynchronous Static Timing Analysis (ASTA) methodology for Asynchronous Control Circuits, which pessimistically computes Critical Cycle(s), instead of Critical Paths, without cycle cutting. Its additional requirement over STA is a graph-based Event Model, Marked Graph or Petri Net. We contrast STA, ASTA results for 23 asynchronous circuit benchmarks, and demonstrate significant timing differences between the ASTA critical cycle and STA critical path, with cut cycles. We also demonstrate our correlation to SPICE level simulations, for 20 of the 23 circuits. Our ASTA flow effectively upper bounds critical cycle delay over SPICE, and is orders of magnitude faster. © 2020 Elsevier B.V

Graph-Based STA for Asynchronous Controllers

In this work, we present an Asynchronous Static Timing Analysis (ASTA) EDA methodology for cyclic, Asynchronous Control Circuits. Our methodology operates using Graph-based Analysis (GBA) principles, as conventional synchronous GBA STA, is fast, and pessimistically computes Critical Cycle(s), instead of Critical Paths, without cycle cutting. Our ASTA flow supports industrial Timing Libraries, Verilog input and multiple PVT corners. Gate timing arc delay/slew computation, input/output environment constraints, and path delay propagation, are implemented based on GBA STA principles. To perform ASTA, both gate-level netlist and a graph-based Event Model, Marked Graph (MG) or PeTri Net (PTnet), is required. The pair is used to construct the Event Timing Graph (ETG), an MG with annotated netlist extracted delays, for Event Model Transition to Transition (T2T) arcs. ETG delays are computed automatically, based on cyclic equilibrium slews, and GBA critical path identification between relevant T2T netlist gate pins. GBA T2T paths may be manually overridden. As GBA is non-functional, we illustrate a mapping between an Event Model, where choice places may be allowed, and the ETG, where places are collapsed to their corresponding timing annotated T2T arcs. The resultant ETG is live and 1-bounded, making it suitable for Period analysis using Burns Primal-Dual Algorithm. Our methodology has been successfully tested on 23 asynchronous benchmarks, and validated via timing simulation. We compare results against an industrial, synchronous STA tool with cycle cutting, and illustrate significant timing errors, when synchronous STA is used for delay annotation, as well as a 50% delta in Critical Cycle Delay. © 2019 IEEE

Linear Time S-Component Extraction for General Petri Nets

In this work, we present a linear time, S-component extraction algorithm capable of handling strongly connected, General Petri Nets. Most prior works have focused exclusively on Free-Choice or Extended Free-Choice Nets. We generalise S-component extraction to General Petri Nets, providing a fast transformation between event and state-based spaces. This work is directly applicable to Petri Net based logic synthesis, as a Petri Net event model describing a system's behaviour, may be mapped to a set of S-components, and eventually interacting on Multiple Synchronised FSMs (MSFMSs) [1], implemented in synchronous or asynchronous Boolean Logic. We have tested a set of 25 Petri Net benchmarks, including FSMs, Marked Graphs, Free-Choice, Extended Free-Choice, Asymmetric Choice and General Petri Nets. Our algorithm managed to successfully generate correct S-covering results for all of them. We present results against the original algorithm of [2]. The S-component extraction algorithm complexity is O(P+T+F). © 2019 IEEE

Breast cancer in reproductive age. the new plaque or just myth?

It is interesting to assess the hitherto knowledge, on breast cancer in reproductive and young females, aged <35. Even if breast cancer is rare in this group, it is, also physically and emotionally devastating. It is characterized by worse prognosis and outcome, in a stage of life, which is delicate for the female patients. This rare subgroup of breast cancer patients is ought to be the center of investigation in future studies. This paper's mail goal is to elucidate this entity, by presenting several aspects of the disease including risk factors, therapy, natural history and major differences between the groups of breast cancer patients and last but not least, the psychosocial features of this clinical entity, by reviewing the current and past medical literature till April 2011. © 2011 Elsevier Ltd. All rights reserved