40 research outputs found
ReProHRL: Towards Multi-Goal Navigation in the Real World using Hierarchical Agents
Robots have been successfully used to perform tasks with high precision. In
real-world environments with sparse rewards and multiple goals, learning is
still a major challenge and Reinforcement Learning (RL) algorithms fail to
learn good policies. Training in simulation environments and then fine-tuning
in the real world is a common approach. However, adapting to the real-world
setting is a challenge. In this paper, we present a method named Ready for
Production Hierarchical RL (ReProHRL) that divides tasks with hierarchical
multi-goal navigation guided by reinforcement learning. We also use object
detectors as a pre-processing step to learn multi-goal navigation and transfer
it to the real world. Empirical results show that the proposed ReProHRL method
outperforms the state-of-the-art baseline in simulation and real-world
environments in terms of both training time and performance. Although both
methods achieve a 100% success rate in a simple environment for single
goal-based navigation, in a more complex environment and multi-goal setting,
the proposed method outperforms the baseline by 18% and 5%, respectively. For
the real-world implementation and proof of concept demonstration, we deploy the
proposed method on a nano-drone named Crazyflie with a front camera to perform
multi-goal navigation experiments.Comment: AAAI 2023 RL Ready for Production Worksho
Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks
In this paper, we propose Code-Bridged Classifier (CBC), a framework for
making a Convolutional Neural Network (CNNs) robust against adversarial attacks
without increasing or even by decreasing the overall models' computational
complexity. More specifically, we propose a stacked encoder-convolutional
model, in which the input image is first encoded by the encoder module of a
denoising auto-encoder, and then the resulting latent representation (without
being decoded) is fed to a reduced complexity CNN for image classification. We
illustrate that this network not only is more robust to adversarial examples
but also has a significantly lower computational complexity when compared to
the prior art defenses.Comment: 6 pages, Accepted and to appear in ISQED 202
Design and evaluation of FPGA-based gigabit-Ethernet/PCI network interface card
The continuing advances in the performance of network servers make it essential for network interface cards (NICs) to provide more sophisticated services and data processing. Modern network interfaces provide fixed functionality and are optimized for sending and receiving large packets. One of the key challenges for researchers is to find effective ways to investigate novel architectures for these new services and evaluate their performance characteristics in a real network interface platform.
This thesis presents the design and evaluation of a flexible and configurable Gigabit Ethernet/PCI network interface card using FPGAs. The FPGA-based NIC includes multiple memories, including SDRAM SODIMM, for adding new network services. The experimental results at Gigabit Ethernet receive interface indicate that the NIC can receive all packet sizes and store them at SDRAM at Gigabit Ethernet line rate. This is promising since no existing NIC use SDRAM due to the SDRAM latency
RICE UNIVERSITY Design and Evaluation of FPGA-Based Gigabit-Ethernet/PCI Network Interface Card By
i The continuing advances in the performance of network servers make it essential for network interface cards (NICs) to provide more sophisticated services and data processing. Modern network interfaces provide fixed functionality and are optimized for sending and receiving large packets. One of the key challenges for researchers is to find effective ways to investigate novel architectures for these new services and evaluate their performance characteristics in a real network interface platform. This thesis presents the design and evaluation of a flexible and configurable Gigabit Ethernet/PCI network interface card using FPGAs. The FPGA-based NIC includes multiple memories, including SDRAM SODIMM, for adding new network services. The experimental results at Gigabit Ethernet receive interface indicate that the NIC can receive all packet sizes and store them at SDRAM at Gigabit Ethernet line rate. This is promising since no existing NIC use SDRAM due to the SDRAM latency. i