Effect of the crystallographic c-axis orientation on the tribological properties of the few-layer PtSe2

Two-dimensional (2D) transition metal dichalcogenides are potential candidates for ultrathin solid-state lubricants in low-dimensional systems owing to their flatness, high in-plane mechanical strength, and low shear interlayer strength. Yet, the effects of surface topography and surface chemistry on the tribological properties of 2D layers are still unclear. In this work, we performed a comparative investigation of nanoscale tribological properties of ultra-thin highly-ordered PtSe2 layers deposited on the sapphire substrates with the in-plane and out-of-plane crystallographic orientation of the PtSe2 c-axis flakes, and epitaxial PtSe2 layers. PtSe2 c-axis orientation was found to has an impact on the nanotribological, morphological and electrical properties of PtSe2, in particular the change in the alignment of the PtSe2 flakes from vertical (VA) to horizontal (HA) led to the lowering of the coefficient of friction from 0.21 to 0.16. This observation was accompanied by an increase in the root-mean-square surface roughness from 1.0 to 1.7 nm for the HA and VA films, respectively. The epitaxial films showed lower friction caused by lowering adhesion when compared to other investigated films, whereas the friction coefficient was similar to films with HA flakes. The observed trends in nanoscale friction is attributed to a different distribution of PtSe2 structure

Characterization of High Energy Irradiated MOS Structures Using the Capacitance Methods

The formation and annealing of radiation-induced defects in MOS structures exposed to 710 MeV Bi ions and 305 MeV Kr ions radiation with a fluency of 10^9 and 10^10cm^2 have been studied by capacitance methods. Electrical activity of the defects has braought increase of interface trap density Dit and a sharp decrease in the generation parameters tr and τg. The parameters of nine deep levels were detected in the investigation MOS structures. Eight of these levels were radiation defects.<br /

Application of Open Circuit Voltage Decay to the Characterization of p/n+ and n/p+ Epitaxial Layer

High quality silicon epitaxial layers are inevitable in bipolar and/or unipolar technology. However, its properties are not as easy characterized as those of bulk material. The recombination lifetime is dominated by surface/interface recombination for thin layers, which epitaxial ones generally are. We have designed diode structure with n+n/p+and  p+p/n+ epitaxial layer for open circuit voltage decay (OCVD) technigue. In such a structure, injected carriers are constrained within lightly doped base by potential barriers of junction and high-low contact and their concentration can then decrease only by recombination. Carrier lifetime obtained by this manner yields information mainly about the defect properties of epitaxial layer. Performing OCVD measurement for high-level injection condition, also tn and tp could be evaluated

Characterization of Unipolar Power Devices Technology

The quality of momentus technological steps in unipolar power devices manufactoring was examine by means of capacitance and current measurements using a metal-oxide-semiconductor capacitors (MOS-C). From the low- (If) and high-frequency (hf) capacitance-voltage (C-V) curves, the effective defect charge and energy distribution of Si-SiO2 interface trap density were extracted, respectively. performin non-steady capacitance-time (C-t) and the time domain constant-capacitance (cC-t) at well as deep level transient spectroscopy (DLTS) techniques we have analysed electrically active that generation parameters are mostly influenced by traps at the Si-SiO2 interface. Moreover, breakdown voltage measurement confirms high quality and homogeneity of thermal oxide. Low density of carrier traps was achieved by intrinsic gettering technique

Hot-Electron-Related Degradation in InAlN/GaN High-Electron-Mobility Transistors

Hot-electron temperature (T-e) in InAlN/GaN high-electron-mobility transistors (HEMTs) was determined using electroluminescence spectroscopy as a function of gate voltage and correlated with the Te distribution determined by hydrodynamic simulations. Good agreement between measurement and simulations suggests that hot electrons can locally reach temperatures of up to 30 000 K at V-ds = 30 V, i.e., two to three times higher than that typically obtained for similar AlGaN/GaN HEMTs. The consequence of such high Te in InAlN/GaN HEMTs is illustrated by electrical stressing in OFF and semi-ON state at V-gd = 100 V. Prominent channel degradation was observed for devices stressed in semi-ON state, suggesting hot-electron driven degradation. Threshold voltage and drain current transient analyses indicate that hot electrons increase the density of traps in the GaN channel underneath the gate as well as surface/interface traps located in the gate-to-drain access region

Interface States and Trapping Effects in Al1O3- and ZrO2/InAlN/AlN/GaN Metal-Oxide-Semiconductor Heterostructures

We investigate Al2O3- and ZrO2/InAlN/GaN metal-oxide-semiconductor heterostructures (MOS-H) using capacitance-time transients in the temperature range of 25-300 degrees C. A deep-level transient spectroscopy based analysis revealed the maximum interface state density distributions D-it(E) up to 3 x 10(13) and 1 X 10(13) eV(-1) cm(-2) for the Al2O3/InAlN and ZrO2/InAlN interface, respectively. The integral densities of interface states correlate well with the trapping-related gate-lag effect in corresponding InAlN/GaN MOS high electron mobility transistors (HEMTs). This explains the strongly reduced lag effect in ZrO2 MOS HEMTs. We assume hole trapping at oxide/InAlN interface to be a dominant effect responsible for the gate-lag effect in InAlN/GaN MOS HEMTs. (C) 2009 The Japan Society of Applied Physics 10.1143/JJAP.48.09020