199 research outputs found

    Dynamic response of a spin-1/2 Kondo singlet

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    We present a study of spin 1/2 Kondo singlets in single electron transistors under a microwave frequency bias excitation. We compare time-averaged conductance GG to predicted universal response with respect to microwave frequency, oscillation amplitude and the Kondo temperature and find a non-adiabatic response when the microwave photon energy hfhf is comparable to the Kondo temperature kBTKk_B T_K. We show that our measurements are qualitatively consistent with the predictions for the radiation-induced decoherence rate of the Kondo spin

    Tunneling images of a 2D electron system in a quantizing magnetic field

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    We have applied a scanning probe method, Subsurface Charge Accumulation (SCA) imaging, to resolve the local structure of the interior of a semiconductor two-dimensional electron system (2DES) in a tunneling geometry. Near magnetic fields corresponding to integer Landau level filling, submicron scale spatial structure in the out-of-phase component of the tunneling signal becomes visible. In the images presented here, the structure repeats itself when the filling factor is changed from nu=6 to nu=7. Therefore, we believe the images reflect small modulations in the 2DES density caused by the disorder in the sample.Comment: 2 pages, 2 color figures, submitted to LT23 proceeding

    Ultra narrow AuPd and Al wires

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    In this letter we discuss a novel and versatile template technique aimed to the fabrication of sub-10 nm wide wires. Using this technique, we have successfully measured AuPd wires, 12 nm wide and as long as 20 μ\mum. Even materials that form a strong superficial oxide, and thus not suited to be used in combination with other techniques, can be successfully employed. In particular we have measured Al wires, with lateral width smaller or comparable to 10 nm, and length exceeding 10 μ\mum.Comment: 4 pages, 4 figures. Pubblished in APL 86, 172501 (2005). Added erratum and revised Fig.

    Experiments in Interrupted Growth Molecular Beam Epitaxy Technology

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    From a device structure standpoint it would be advantageous to sandwich laterally defined features between layers of epitaxially grown material. In silicon this is commonly dope by growing the bottom layer, patterning the desired feature, and growing a second layer. Unfortunately, this process has not been practical in GaAs for the same reason that there is no true MOS technology in GaAs: The. GaAs surface is irreparably damaged when it is exposed to the atmosphere leading to the formation of undesirable interface states. Heterojunction FET\u27s are feasible only because high quality epilayers are grown during a single run in an ultrahigh vacuum environment. Standard growth methods allow for variation of doping and material content only in one direction, normal to the wafer surface. Varying the material in more than one dimension without the use of prohibitively exotic equipment requires removal of the wafer from the growth apparatus for lateral processing between material growths. Thus the problem that this thesis attempts to address: How to protect a GaAs surface during a lateral processing step and initiate regrowth leaving behind an electrically invisible restart interface. The potential applications of the development of a successful interrupted growth scheme for GaAs are numerous and far reaching. Specifically it would allow the fabrication of advantageous device geometries that are not possible under single material growth runs. Although this thesis deals exclusively with ion implanted interrupted growth by Molecular Beam Epitaxy, some of the concepts arid theories can be extended to other growth methods. It is both a review of previous work and a report of our attempts at Purdue to fabricate the first interrupted growth HIGFET\u27s and MISFET\u27s. Mechanisms behind the success and failure of GaAs interrupted growth are discussed and several experiments involving passivation materials and new interrupted growth schemes are propose

    Characterization of photon recycling in thin crystalline GaAs light emitting diodes

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    Gallium arsenide light emitting diodes (LEDs) were fabricated using molecular beam epitaxial films on GaAs substrates and removed by epitaxial lift-off (ELO). Lifted off devices were then mounted on a Si wafer using a Pd/Au/Cr contact layer, which also served as a back surface reflector. Devices were characterized by electrical and optical measurements, and the results for devices on the GaAs substrate were compared to those for EL0 devices. EL0 LEDs coated with a ZnS/MgF2 antireflection coating exhibited an optical output that was up to six times that of LEDs on GaAs substrates. At the same time, the measured current-voltage characteristics of the EL0 devices displayed a lower IZ = 1 current component. EL0 LEDs with efficiencies up to 12.5% were realized. We attribute these results to photon recycIing enhanced by the back-surface reflector in the EL0 LEDs. The luminescence versus current and current versus voltage characteristics of the LEDs were analyzed to obtain the nonradiative minority carrier lifetimes and the photon recycling factors. The results demonstrate that the measured characteristics are well described by photon recycling theory. EL0 LEDs may prove useful for characterizing recombination processes in LEDs, and thin-crystalline structures could provide substantial efficiency enhancements for LEDs and solar cells

    Temperature dependence of minority and majority carrier mobilities in degenerately doped GaAs

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    Measured minority and majority carrier mobility temperature dependencies in heavily doped n- and p-GaAs are compared. Majority carrier mobilities in heavily doped GaAs are essentially temperature ~T! independent while minority carrier mobilities exhibit a roughly 1/T dependence. Majority carrier freezeout, which reduces both majority–minority carrier and ionized impurity scattering, is shown not to be responsible for the 1/T minority carrier mobility dependence. The difference in minority and majority carrier mobility T dependencies is explained in terms of the increased degree of degeneracy of majority carriers with decreased temperature, which decreases majority–minority carrier scattering

    A quantitative study of spin-flip co-tunneling transport in a quantum dot

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    We report detailed transport measurements in a quantum dot in a spin-flip co-tunneling regime, and a quantitative comparison of the data to microscopic theory. The quantum dot is fabricated by lateral gating of a GaAs/AlGaAs heterostructure, and the conductance is measured in the presence of an in-plane Zeeman field. We focus on the ratio of the nonlinear conductance values at bias voltages exceeding the Zeeman threshold, a regime that permits a spin flip on the dot, to those below the Zeeman threshold, when the spin flip on the dot is energetically forbidden. The data obtained in three different odd-occupation dot states show good quantitative agreement with the theory with no adjustable parameters. We also compare the theoretical results to the predictions of a phenomenological form used previously for the analysis of non-linear co-tunneling conductance, specifically the determination of the heterostructure g-factor, and find good agreement between the two.Comment: 5 pages, 5 figure

    Effect of impurity trapping on the capacitance‐voltage characteristics of n‐GaAs/N‐AlGaAs heterojunctions

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    We have studied the capacitance-voltage (C- V) characteristics of Schottky barriers on inverted nGaAs/ N-AIGaAs and normal N-AIGaAs/n-GaAs heterojunctions. Impurities introduced during film growth produced a negative sheet charge of 6.0 X 10 II cm -2 at the interface of the inverted n-GaAs/N-AIGaAs heterojunction. The effectiveness of GaAs quantum wells in trapping these impurities was investigated. GaAs quantum wells 20 A wide were placed in intervals of 2500 A for the first 0.75 pm of the AIGaAs layer; in the last 0.25 pm, the periodicity of the quantum wells was progressively decreased by half with the last quantum well placed at about 160 A from the GaAs/ AIGaAs interface. The resulting measured interface charge concentration of 4.4 X 1010 cm -2 is more than a magnitude lower than measured before the use of the quantum wells and is essentially at the limit of the accuracy of the C-V technique for this structure
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