A Fully Differential CMOS Potentiostat

A CMOS potentiostat for chemical sensing in a noisy environment is presented. The potentiostat measures bidirectional electrochemical redox currents proportional to the concentration of a chemical down to pico-ampere range. The fully differential architecture with differential recording electrodes suppresses the common mode interference. A 200μm×200μm prototype was fabricated in a standard 0.35μm standard CMOS technology and yields a 70dB dynamic range. The in-channel analog-to-digital converter (ADC) performs 16-bit current-tofrequency quantization. The integrated potentiostat functionality is validated in electrical and electrochemical experiments

Impacts of Logging-Associated Compaction on Forest Soils: A Meta-Analysis

Soil compaction associated with mechanized wood harvesting can long-lastingly disturb forest soils, ecosystem function, and productivity. Sustainable forest management requires precise and deep knowledge of logging operation impacts on forest soils, which can be attained by meta-analysis studies covering representative forest datasets. We performed a meta-analysis on the impact of logging-associated compaction on forest soils microbial biomass carbon (MBC), bulk density, total porosity, and saturated hydraulic conductivity (Ksat) affected by two management factors (machine weight and passage frequency), two soil factors (texture and depth), and the time passed since the compaction event. Compaction significantly decreased soil MBC by −29.5% only in subsoils (>30 cm). Overall, compaction increased soil bulk density by 8.9% and reduced total porosity and Ksat by −10.1 and −40.2%, respectively. The most striking finding of this meta-analysis is that the greatest disturbance to soil bulk density, total porosity, and Ksat occurs after very frequent (>20) machine passages. This contradicts the existing claims that most damage to forest soils happens after a few machine passages. Furthermore, the analyzed physical variables did not recover to the normal level within a period of 3–6 years. Thus, altering these physical properties can disturb forest ecosystem function and productivity, because they play important roles in water and air supply as well as in biogeochemical cycling in forest ecosystems. To minimize the impact, we recommend the selection of suitable logging machines and decreasing the frequency of machine passages as well as logging out of rainy seasons especially in clayey soils. It is also very important to minimize total skid trail coverage for sustainable forest management

Keeping thinning-derived deadwood logs on forest floor improves soil organic carbon, microbial biomass, and enzyme activity in a temperate spruce forest

Deadwood is a key component of forest ecosystems, but there is limited information on how it influences forest soils. Moreover, studies on the effect of thinning-derived deadwood logs on forest soil properties are lacking. This study aimed to investigate the impact of thinning-derived deadwood logs on the soil chemical and microbial properties of a managed spruce forest on a loamy sand Podzol in Bavaria, Germany, after about 15 years. Deadwood increased the soil organic carbon contents by 59% and 56% at 0–4 cm and 8–12 cm depths, respectively. Under deadwood, the soil dissolved organic carbon and carbon to nitrogen ratio increased by 66% and 15% at 0–4 cm depth and by 55% and 28% at 8–12 cm depth, respectively. Deadwood also induced 71% and 92% higher microbial biomass carbon, 106% and 125% higher microbial biomass nitrogen, and 136% and 44% higher β-glucosidase activity in the soil at 0–4 cm and 8–12 cm depths, respectively. Many of the measured variables significantly correlated with soil organic carbon suggesting that deadwood modified the soil biochemical processes by altering soil carbon storage. Our results indicate the potential of thinned spruce deadwood logs to sequester carbon and improve the fertility of Podzol soils. This could be associated with the slow decay rate of spruce deadwood logs and low biological activity of Podzols that promote the accumulation of soil carbon. We propose that leaving thinning-derived deadwood on the forest floor can support soil and forest sustainability as well as carbon sequestration

Ocean remote sensing techniques and applications: a review (Part II)

As discussed in the first part of this review paper, Remote Sensing (RS) systems are great tools to study various oceanographic parameters. Part I of this study described different passive and active RS systems and six applications of RS in ocean studies, including Ocean Surface Wind (OSW), Ocean Surface Current (OSC), Ocean Wave Height (OWH), Sea Level (SL), Ocean Tide (OT), and Ship Detection (SD). In Part II, the remaining nine important applications of RS systems for ocean environments, including Iceberg, Sea Ice (SI), Sea Surface temperature (SST), Ocean Surface Salinity (OSS), Ocean Color (OC), Ocean Chlorophyll (OCh), Ocean Oil Spill (OOS), Underwater Ocean, and Fishery are comprehensively reviewed and discussed. For each application, the applicable RS systems, their advantages and disadvantages, various RS and Machine Learning (ML) techniques, and several case studies are discussed.Peer ReviewedPostprint (published version

The Post-Eocene Evolution of the Doruneh Fault Region (Central Iran): The Intraplate Response to the Reorganization of the Arabia-Eurasia Collision Zone

The Cenozoic deformation history of Central Iran has been dominantly accommodated by the activation of major intracontinental strike-slip fault zones, developed in the hinterland domain of the Arabia-Eurasia convergent margin. Few quantitative temporal and kinematic constraints are available from these strike-slip deformation zones, hampering a full assessment of the style and timing of intraplate deformation in Iran and the understanding of the possible linkage to the tectonic reorganization of the Zagros collisional zone. This study focuses on the region to the north of the active trace of the sinistral Doruneh Fault. By combing structural and low-temperature apatite fission track (AFT) and (U-Th)/He (AHe) thermochronology investigations, we provide new kinematic and temporal constraints to the deformation history of Central Iran. Our results document a post-Eocene polyphase tectonic evolution dominated by dextral strike-slip tectonics, whose activity is constrained since the early Miocene in response to an early, NW-SE oriented paleo-σ1 direction. A major phase of enhanced cooling/exhumation is constrained at the Miocene/Pliocene boundary, caused by a switch of the maximum paleo-σ1 direction to N-S. When integrated into the regional scenario, these data are framed into a new tectonic reconstruction for the Miocene-Quaternary time lapse, where strike-slip deformation in the intracontinental domain of Central Iran is interpreted as guided by the reorganization of the Zagros collisional zone in the transition from an immature to a mature stage of continental collision

Electrical and Optical Interconnects for High-Performance Computing

Technology scaling has enabled drastic growth in the computational and storage capacity of integrated circuits (ICs). This constant growth drives an increasing demand for high-bandwidth communication between and within ICs. In this dissertation we focus on low-power solutions that address this demand. We divide communication links into three subcategories depending on the communication distance. Each category has a different set of challenges and requirements and is affected by CMOS technology scaling in a different manner. We start with short-range chip-to-chip links for board-level communication. Next we will discuss board-to-board links, which demand a longer communication range. Finally on-chip links with communication ranges of a few millimeters are discussed. Electrical signaling is a natural choice for chip-to-chip communication due to efficient integration and low cost. IO data rates have increased to the point where electrical signaling is now limited by the channel bandwidth. In order to achieve multi-Gb/s data rates, complex designs that equalize the channel are necessary. In addition, a high level of parallelism is central to sustaining bandwidth growth. Decision feedback equalization (DFE) is one of the most commonly employed techniques to overcome the limited bandwidth problem of the electrical channels. A linear and low-power summer is the central block of a DFE. Conventional approaches employ current-mode techniques to implement the summer, which require high power consumption. In order to achieve low-power operation we propose performing the summation in the charge domain. This approach enables a low-power and compact realization of the DFE as well as crosstalk cancellation. A prototype receiver was fabricated in 45nm SOI CMOS to validate the functionality of the proposed technique and was tested over channels with different levels of loss and coupling. Measurement results show that the receiver can equalize channels with maximum 21dB loss while consuming about 7.5mW from a 1.2V supply. We also introduce a compact, low-power transmitter employing passive equalization. The efficacy of the proposed technique is demonstrated through implementation of a prototype in 65nm CMOS. The design achieves up to 20Gb/s data rate while consuming less than 10mW. An alternative to electrical signaling is to employ optical signaling for chip-to-chip interconnections, which offers low channel loss and cross-talk while providing high communication bandwidth. In this work we demonstrate the possibility of building compact and low-power optical receivers. A novel RC front-end is proposed that combines dynamic offset modulation and double-sampling techniques to eliminate the need for a short time constant at the input of the receiver. Unlike conventional designs, this receiver does not require a high-gain stage that runs at the data rate, making it suitable for low-power implementations. In addition, it allows time-division multiplexing to support very high data rates. A prototype was implemented in 65nm CMOS and achieved up to 24Gb/s with less than 0.4pJ/b power efficiency per channel. As the proposed design mainly employs digital blocks, it benefits greatly from technology scaling in terms of power and area saving. As the technology scales, the number of transistors on the chip grows. This necessitates a corresponding increase in the bandwidth of the on-chip wires. In this dissertation, we take a close look at wire scaling and investigate its effect on wire performance metrics. We explore a novel on-chip communication link based on a double-sampling architecture and dynamic offset modulation technique that enables low power consumption and high data rates while achieving high bandwidth density in 28nm CMOS technology. The functionality of the link is demonstrated using different length minimum-pitch on-chip wires. Measurement results show that the link achieves up to 20Gb/s of data rate (12.5Gb/s/$\mu$m) with better than 136fJ/b of power efficiency.</p

Possible Scenarios of Winter Wheat Yield Reduction of Dryland Qazvin Province, Iran, Based on Prediction of Temperature and Precipitation Till the End of the Century

The climate of the Earth is changing. The Earth&rsquo;s temperature is projected to maintain its upward trend in the next few decades. Temperature and precipitation are two very important factors affecting crop yields, especially in arid and semi-arid regions. There is a need for future climate predictions to protect vulnerable sectors like agriculture in drylands. In this study, the downscaling of two important climatic variables&mdash;temperature and precipitation&mdash;was done by the CanESM2 and HadCM3 models under five different scenarios for the semi-arid province of Qazvin, located in Iran. The most efficient scenario was selected to predict the dryland winter wheat yield of the province for the three periods: 2010&ndash;2039, 2040&ndash;2069, and 2070&ndash;2099. The results showed that the models are able to satisfactorily predict the daily mean temperature and annual precipitation for the three mentioned periods. Generally, the daily mean temperature and annual precipitation tended to decrease in these periods when compared to the current reference values. However, the scenarios rcp2.6 and B2, respectively, predicted that the precipitation will fall less or even increase in the period 2070&ndash;2099. The scenario rcp2.6 seemed to be the most efficient to predict the dryland winter wheat yield of the province for the next few decades. The grain yield is projected to drop considerably over the three periods, especially in the last period, mainly due to the reduction in precipitation in March. This leads us to devise some adaptive strategies to prevent the detrimental impacts of climate change on the dryland winter wheat yield of the province

Ultra Low-Power Receiver Design for Dense Optical Interconnects

With the increasing bandwidth requirements of computing systems and limitations on power consumption, optical signaling for chip-to-chip interconnects has gained a lot of interest. Hybrid integration of optical devices with electronics has been demonstrated to achieve high performance [1]-[4], and recent advances in silicon photonics have led to fully integrated systems [5]. These approaches pave the way to massively parallel optical communications. Dense arrays of optical detectors require very low-power, sensitive, and compact optical receiver circuits. Existing designs for the input receiver, such as TIA, require large power consumption to achieve high bandwidth and low noise, and can occupy large area due to bandwidth enhancement inductors. In this work, a compact low-power optical receiver that scales well with technology has been designed to explore the potential of optical signaling for future chip-to-chip and on-chip communication. In most optical receivers, the photodiode current is converted to a voltage signal. A simple resistor can perform the I-V conversion if the resulting RC time constant is in the order of the bit interval (T_b) [5]. However, for a given photodiode capacitance and target SNR, the RC limits the bandwidth and hence the data rate. To avoid this problem, TIAs are commonly employed, which are highly analog, power hungry, and do not scale well with technology. One alternative is the integrating front-end to eliminate the need for resistance and breaking the bandwidth trade-off. However, this technique suffers from voltage headroom limitations, and requires short-length DC-balanced inputs [6]. The proposed receiver resolves this problem by employing an integrating RC front-end along with dynamic offset modulation technique that decouple the bandwidth/data-rate and integration/headroom trade-offs [7]