2,627 research outputs found
Historia de Archidona [Manuscrito]
En la nota aparece: Respuesta al cuestionario de Medina Conde para su "Diccionario de Málaga" por Don Antonio Tomás de Herrera en 1774
Por don Gonzalo Chacon Medina y Salazar, Cavallero del Orden de Calatrava, del Consejo de su Magestad, y Juntas de Armadas, Capitan General, que fue de la Armada de Galeones de la Guardia de las Indias, que vltimamente llegó de la Provincia de Tierra-firme à la Baía de Cadiz, y preso en la Ciudad de Sanlucar de Barrameda en la causa criminal, en que esta procediendo el Señor D. Antonio de Arguelles y Valdès, del Consejo de su Magestad, en el Real de las Indias en virtud de Real despacho, expedido por la via reservada, y se prosigue por el Abogado Fiscal nombrado, contra el dicho general D. Gonzalo Chacon Medina y Salazar sobre no aver ido al puerto de Santander, como se mandava por su Magestad, por sus Reales ordenes, y auer entrado con la Armada de su cargo en la Baía de Cadiz
Texto firmado por Juan de Molina Guerra, en Sevilla, 1688
Doña Ines de Castro, cuello de garza, de Portugal
Pie de imp. consta en colSign.: []2Texto a dos colGrab. xil. en cabecera alusiva al romanc
Design of OpenCL-compatible multithreaded hardware accelerators with dynamic support for embedded FPGAs
ARTICo3 is an architecture that permits to dynamically set an arbitrary number of reconfigurable hardware accelerators, each containing a given number of threads fixed at design time according to High Level Synthesis constraints. However, the replication of these modules can be decided at runtime to accelerate kernels by increasing the overall number of threads, add modular redundancy to increase fault tolerance, or any combination of the previous. An execution scheduler is used at kernel invocation to deliver the appropriate data transfers, optimizing memory transactions, and sequencing or parallelizing execution according to the configuration specified by the resource manager of the architecture. The model of computation is compatible with the OpenCL kernel execution model, and memory transfers and architecture are arranged to match the same optimization criteria as for kernel execution in GPU architectures but, differently to other approaches, with dynamic hardware execution support. In this paper, a novel design methodology for multithreaded hardware accelerators is presented. The proposed framework provides OpenCL compatibility by implementing a memory model based on shared memory between host and compute device, which removes the overhead imposed by data transferences at global memory level, and local memories inside each accelerator, i.e. compute unit, which are connected to global memory through optimized DMA links. These local memories provide unified access, i.e. a continuous memory map, from the host side, but are divided in a configurable number of independent banks (to increase available ports) from the processing elements side to fully exploit data-level parallelism. Experimental results show OpenCL model compliance using multithreaded hardware accelerators and enhanced dynamic adaptation capabilities
Por don Jorge Carrillo ... en el pleyto con don Juan Geronimo de Frias ... sobre que se revoque la sentencia dada por el alcalde d. Melchor Prous en 14 de julio de 713 en que declarò aver lugar la reinvindacion y reintegro al mayorazgo de Agonzillo, intentada por dicho don Juan Geronimo de Frias su poseedor
Texto firmado por el lic. Francisco de Arriaza y MedinaCopia digital. Valladolid : Junta de Castilla y León. Consejería de Cultura y Turismo, 2009-2010Port. con orla tip. y grab. xil. de la Inmaculad
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