Transistors with Dual Work Function Metal Gates by Single Full Silicidation (FUSI) of Polysilicon

Metal gate electrodes with two different work functions, ~4.5 and ~4.9 eV for NMOS and PMOS, respectively, were obtained by single-step full silicidation of poly gates. Reduction of polysilicon depletion was ~0.25 nm. Pile-up of arsenic at the NMOS dielectric is believed responsible for NiSi work function modification. Metal gate may offer little or no gate current reduction for the same T oxinv as poly gate

Silicon on aluminum nitride structures formed by wafer bonding

This paper deals with the use of reactively sputtered aluminum nitride (AlN) films as insulators for Bond and Etch-back Silicon-On-Insulator (BESOI) materials. In SOI-applications where high power is dissipated in the silicon SOI-film the low thermal conductivity of the buried silicon dioxide layer may cause a temperature rise in the silicon film detrimentally affecting the device performance. An attractive alternative would be to replace the silicon dioxide of the SOI structure with another material, like diamond, silicon carbide or aluminum nitride. The thermal conductivity of AlN is considerably larger than that of Si02. This paper presents results on how sputter deposition of AlN may be combined with wafer bonding for the creation of highly thermally conductive SOI structure

L-g=100 nm In0.7Ga0.3As quantum well metal-oxide semiconductor field-effect transistors with atomic layer deposited beryllium oxide as interfacial layer

In this study, we have fabricated nanometer-scale channel length quantum-well (QW) metal-oxide-semiconductor field effect transistors (MOSFETs) incorporating beryllium oxide (BeO) as an interfacial layer. BeO has high thermal stability, excellent electrical insulating characteristics, and a large band-gap, which make it an attractive candidate for use as a gate dielectric in making MOSFETs. BeO can also act as a good diffusion barrier to oxygen owing to its small atomic bonding length. In this work, we have fabricated In0.53Ga0.47As MOS capacitors with BeO and Al2O3 and compared their electrical characteristics. As interface passivation layer, BeO/HfO2 bilayer gate stack presented effective oxide thickness less 1 nm. Furthermore, we have demonstrated In0.7Ga0.3As QW MOSFETs with a BeO/HfO2 dielectric, showing a sub-threshold slope of 100 mV/dec, and a transconductance (g(m, max)) of 1.1 mS/mu m, while displaying low values of gate leakage current. These results highlight the potential of atomic layer deposited BeO for use as a gate dielectric or interface passivation layer for III-V MOSFETs at the 7 nm technology node and/or beyond. (C) 2014 AIP Publishing LLC