System Tools for the J-Machine

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A Development Methodology for Concurrent Programs

This paper describes a development methodology for the design of concurrent programs that provides a migration path from existing sequential C and FORTRAN programs. These programs may be executed immediately, without change, using the entire physical memory of a distributed memory machine or a network of ATM-coupled shared-memory multiprocessors. Subsequent program refinements may involve data and control decomposition together with explicit message passing to improve performance. Each step in the program development may utilize new hardware mechanisms supporting shared memory, segmentation and protection. The ideas presented in this paper are currently being implemented within the Multiflow compiler which is being targetted for the M-Machine. Although the examples we present use the C programming language, the concepts will also be available in FORTRAN

A Message-driven Programming System for Fine-grain Multicomputers

VIEW OF THE J-MACHINE This section provides an abstract description of the J-machine hardware. The machine provides three distinct hardware mechanisms to support concurrent programming: message queueing and dispatch, a hardware associative cache, and support for synchronization. Figure 1 provides an abstract view of the hardware that highlights these features