3 research outputs found

    Algorithm-circuit co-design for detecting symptomatic patterns in biological signals

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    The advancement in scaled Silicon technology has accelerated the development of a wide range of applications in various fields including medical technology. It has immensely contributed to finding solutions for monitoring general health as well as alleviating intractable disorders in the form of implantable and wearable systems. This necessitates the development of energy efficient and functionally efficacious systems. This thesis has explored the algorithm-circuit co-design approach for developing an energy efficient epileptic seizure detection processor which could be used for implantable epilepsy prosthesis. Novel wavelet transform based algorithms are proposed for accurate detection of epileptic seizures. Energy efficient techniques at circuit level such as power and clock gating are utilized along with error resiliency at algorithm level to implement these algorithms in TSMC 6565nm bulk-Si technology. Furthermore, the methodology is extended to develop a generic pattern detection system, which could be used for health monitoring. The wavelet transform along with mathematical metrics and Mel cepstrum are used to develop an algorithm which can detect generic patterns in biological audio signals. The application of algorithm-circuit co-design methodology helps in practically implementing this system into a low power design. Using approximation of coefficients and multiplier-less implementation, the Mel cepstrum algorithm is modified to optimize the hardware cost without losing its functional efficacy. The system is user-specific and scalable for detecting various patterns in biological signals. The methodologies mentioned in this thesis are intended towards development of user-scalable, energy efficient and highly efficacious systems for detection of patterns in variety of biological signals

    Ultra Low-Power Algorithm Design for Implantable Devices: Application to Epilepsy Prostheses

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    Low-power circuit design techniques have enabled the possibility of integrating signal processing and feature extraction algorithms on-board implantable medical devices, eliminating the need for wireless transfer of data outside the patient. Feature extraction algorithms also serve as valuable tools for modern-day artificial prostheses, made possible by implantable brain-computer-interface systems. This paper intends to review the challenges in designing feature extraction blocks for implantable devices, with specific focus on developing efficacious but computationally efficient algorithms to detect seizures. Common seizure detection features used to construct algorithms are evaluated and algorithmic, mathematical as well as circuit-level design techniques are suggested to effectively translate the algorithms into hardware implementations on low-power platforms
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