A Review on Vibration Monitoring Techniques for Predictive Maintenance of Rotating Machinery

Machine failure in modern industry leads to lost production and reduced competitiveness. Maintenance costs represent between 15% and 60% of the manufacturing cost of the final product, and in heavy industry, these costs can be as high as 50% of the total production cost. Predictive maintenance is an efficient technique to avoid unexpected maintenance stops during production in industry. Vibration measurement is the main non-invasive method for locating and predicting faults in rotating machine components. This paper reviews the techniques and tools used to collect and analyze vibration data, as well as the methods used to interpret and diagnose faults in rotating machinery. The main steps of this technique are discussed, including data acquisition, data transmission, signal processing, and fault detection. Predictive maintenance through vibration analysis is a key strategy for cost reduction and a mandatory application in modern industry

ASIPAMPIUM: An Efficient ASIP Generator for Low Power Applications

The adoption of customized ASIPs (Application Specific Instruction Set Processors) in embedded circuits is an important alternative for optimizing power consumption, silicon area, or processing performance according to the design requirements. The processor is implemented specifically for the target application, which allows the hardware customization in terms of instruction set architecture, data word length, memory size, and parallelism. This work describes an EDA tool for the semi-automatic development of ASIPs named ASIPAMPIUM. The strategy is to provide a set of integrated tools to interpret and generate a customized hardware for a given target application, including compilation, simulation, and hardware synthesis. From the C code description of the application, the tool returns a synthesizable hardware description of the processor. The proposed methodology is based on the adaptation of a new customizable microprocessor called PAMPIUM, which can be optimized in terms of silicon area, power consumption, or processing performance according to the target application. The ASIPAMPIUM tool provides a series of simulated data to the designer in order to identify optimization strategies in both software and hardware domains. We show the results for the implementation of an FFT algorithm using the proposed methodology, which achieved best results in terms of silicon area and energy consumption compared to other works described in the literature for both FPGA and silicon implementation. Moreover, measurement results of the implementation in silicon of a dedicated ASIP for interfacing with six sensors in real-time, including three I2C, an SPI, and an RS-232 interfaces, demonstrate the complete design flow, from the C code program to physical implementation and characterization. Aside from providing a short design time, the ASIPAMPIUM tool also affords a simple and intuitive design flow, allowing the designer to deal with different design trade-offs and objectives