Modal µ-Calculus, Model Checking and Gauß Elimination

In this paper we present a novel approach for solving Boolean equation systems with nested minimal and maximal fixpoints. The method works by successively eliminating variables and reducing a Boolean equation system similar to Gauß elimination for linear equation systems. It does not require backtracking techniques. Within one framework we suggest a global and a local algorithm. In the context of model checking in the modal-calculus the local algorithm is related to the tableau methods, but has a better worst case complexity

Model checking embedded system designs

We survey the basic principles behind the application of model checking to controller verification and synthesis. A promising development is the area of guided model checking, in which the state space search strategy of the model checking algorithm can be influenced to visit more interesting sets of states first. In particular, we discuss how model checking can be combined with heuristic cost functions to guide search strategies. Finally, we list a number of current research developments, especially in the area of reachability analysis for optimal control and related issues

System Design as a Creative Mathematical Activity

This paper contributes to the understanding of rational systems design and verification. We give evidence that the rôle of mathematics in development and verification is not limited to useful calculations: Ideally, designing is a creative mathematical activity, which comprises finding a theorem, if necessary strengthening its assumptions until it can be proven. A canonical form of this ‘verification theorem’ is introduced and illustrated with informal and formal examples. Although for good reasons most systems are designed without use of formal methods it may be a source of useful insight to understand all design as an ‘approximation’ of such a mathematical activity. This leads amongst others to a taxonomy of design decisions, and it may help to relate paradigms, theories, methods, languages, and tools from different areas of computer science to each other to make optimal use of them

Timed Automaton Models for Simple Programmable Logic Controllers

We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defined in the standard IEC 1131-3. Two different approaches for modelling timers are suggested, that lead to two different timed automaton models. The purpose of this work is to provide a basis for verification and testing of real-time properties of PLC applications. Our work can be seen in broader context: it is a contribution to methodical development of provably correct programs. Even if the present PLC hardware will be substituted by e.g. Personal Computers, with a similar operation mode, the development and verification method will remain useful

What is the method in applying formal methods to PLC applications?

The question we investigate is how to obtain PLC applications with confidence in their proper functioning. Especially, we are interested in the contribution that formal methods can provide for their development. Our maxim is that the place of a particular formal method in the total picture of system development should be made very clear. Developers and customers ought to understand very well what they can rely on or not, and we see our task in trying to make this explicit. Therefore, for us the answer to the question above leads to the following questions: Which parts of the system can be treated formally? What formal methods and tools can be applied? What does their successful application tell (or does not) about the proper functioning of the whole system

Single Value Devices

We live in a world of continuous information overflow, but the quality of information and communication is suffering. Single value devices contribute to the information and communication quality by fo- cussing on one explicit, relevant piece of information. The information is decoupled from a computer and represented in an object, integrates into daily life. However, most existing single value devices come from conceptual experiments or art and exist only as prototypes. In order to get to mature products and to design meaningful, effective and work- ing objects, an integral perspective on the design choices is necessary. Our contribution is a critical exploration of the design space of single value devices. In a survey we give an overview of existing examples. The characterizing design criteria for single value devices are elaborated in a taxonomy. Finally, we discuss several design choices that are specifically important for moving from prototypes to commercializable products

An Effective Tableau System for the Linear Time µ-Calculus

We present a tableau system for the model checking problem of the linear time µ-calculus. It improves the system of Stirling and Walker by simplifying the success condition for a tableau. In our system success for a leaf is determined by the path leading to it, whereas Stirling and Walker's method requires the examination of a potentially infinite number of paths extending over the whole tableau

Verifying the distributed real-time network protocol RTnet using Uppaal

RTnet is a distributed real-time network protocol for fully-connected local area networks with a broadcast capability. It supports streaming real-time and non-realtime traffic and on-the-fly addition and removal of network nodes. This paper presents a formal analysis of RTnet using the model checker Uppaal. Besides normal protocol behaviour, the analysis focuses on the fault-handling properties of RTnet, in particular recovery after packet loss. Both qualitative and quantitative properties are presented, together with the verification results and conclusions about the robustness of RTnet