Controlled delivery of membrane proteins to artificial lipid bilayers by nystatin-ergosterol modulated vesicle fusion

The study of ion channels and other membrane proteins and their potential use as biosensors and drug screening targets require their reconstitution in an artificial membrane. These applications would greatly benefit from microfabricated devices in which stable artificial lipid bilayers can be rapidly and reliably formed. However, the amount of protein delivered to the bilayer must be carefully controlled. A vesicle fusion technique is investigated where composite ion channels of the polyene antibiotic nystatin and the sterol ergosterol are employed to render protein-carrying vesicles fusogenic After fusion with an ergosterol-free artificial bilayer the nystatin-ergosterol channels do not dissociate immediately and thus cause a transient current signal that marks the vesicle fusion event. Experimental pitfalls of this method were identified, the influence of the nystatin and ergosterol concentration on the fusion rate and the shape of the fusion event marker was explored, and the number of different lipid was reduced. Under these conditions, the B-amyloid peptide could be delivered in a controlled manner to a standard planar bilayer. Additionally, the electrical recordings were obtained of vesicles fusing with a planar lipid bilayer in a microfabricated device, demonstrating the suitability of nystatin-ergosterol modulated vesicle fusion for protein delivery within microsystems

Towards zero latency photonic switching in shared memory networks

Photonic networks-on-chip based on silicon photonics have been proposed to reduce latency and power consumption in future chip multi-core processors (CMP). However, high performance CMPs use a shared memory model which generates large numbers of short messages, creating high arbitration latency overhead for photonic switching networks. In this paper we explore techniques which intelligently use information from the memory hierarchy to predict communication in order to setup photonic circuits with reduced or eliminated arbitration latency. Firstly, we present a switch scheduling algorithm which arbitrates on a per memory transaction basis and holds open photonic circuits to exploit temporal locality. We show that this can reduce the average arbitration latency overhead by 60% and eliminate arbitration latency altogether for a signicant proportion of memory transactions. We then show how this technique can be applied to multiple-socket shared memory systems with low latency and energy consumption penalties. Finally, we present ideas and initial results to demonstrate that cache miss prediction could be used to set up photonic circuits for more complex memory transactions and main memory accesses

Broadband 200-nm second-harmonic generation in silicon in the telecom band.

Silicon is well known for its strong third-order optical nonlinearity, exhibiting efficient supercontinuum and four-wave mixing processes. A strong second-order effect that is naturally inhibited in silicon can also be observed, for example, by electrically breaking the inversion symmetry and quasi-phase matching the pump and the signal. To generate an efficient broadband second-harmonic signal, however, the most promising technique requires matching the group velocities of the pump and the signal. In this work, we utilize dispersion engineering of a silicon waveguide to achieve group velocity matching between the pump and the signal, along with an additional degree of freedom to broaden the second harmonic through the strong third-order nonlinearity. We demonstrate that the strong self-phase modulation and cross-phase modulation in silicon help broaden the second harmonic by 200 nm in the O-band. Furthermore, we show a waveguide design that can be used to generate a second-harmonic signal in the entire near-infrared region. Our work paves the way for various applications, such as efficient and broadband complementary-metal oxide semiconductor based on-chip frequency synthesizers, entangled photon pair generators, and optical parametric oscillators

Towards zero latency photonic switching in shared memory networks

Photonic networks-on-chip based on silicon photonics have been proposed to reduce latency and power consumption in future chip multi-core processors (CMP). However, high performance CMPs use a shared memory model which generates large numbers of short messages, creating high arbitration latency overhead for photonic switching networks. In this paper we explore techniques which intelligently use information from the memory hierarchy to predict communication in order to setup photonic circuits with reduced or eliminated arbitration latency. Firstly, we present a switch scheduling algorithm which arbitrates on a per memory transaction basis and holds open photonic circuits to exploit temporal locality. We show that this can reduce the average arbitration latency overhead by 60% and eliminate arbitration latency altogether for a signi cant proportion of memory transactions. We then show how this technique can be applied to multiple-socket shared memory systems with low latency and energy consumption penalties. Finally, we present ideas and initial results to demonstrate that cache miss prediction could be used to set up photonic circuits for more complex memory transactions and main memory accesses

Acceptability and feasibility of peer assisted supervision and support for intervention practitioners: a Q-methodology evaluation

Evidence-based interventions often include quality improvement methods to support fidelity and improve client outcomes. Clinical supervision is promoted as an effective way of developing practitioner confidence and competence in delivery; however, supervision is often inconsistent and embedded in hierarchical line management structures that may limit the opportunity for reflective learning. The Peer Assisted Supervision and Support (PASS) supervision model uses peer relationships to promote the self-regulatory capacity of practitioners to improve intervention delivery. The aim of the present study was to assess the acceptability and feasibility of PASS amongst parenting intervention practitioners. A Q-methodology approach was used to generate data and 30 practitioners volunteered to participate in the study. Data were analyzed and interpreted using standard Q-methodology procedures and by-person factor analysis yielded three factors. There was consensus that PASS was acceptable. Participants shared the view that PASS facilitated an environment of support where negative aspects of interpersonal relationships that might develop in supervision were not evident. Two factors represented the viewpoint that PASS was also a feasible model of supervision. However, the third factor was comprised of practitioners who reported that PASS could be time consuming and difficult to fit into existing work demands. There were differences across the three factors in the extent to which practitioners considered PASS impacted on their intervention delivery. The findings highlight the importance of organizational mechanisms that support practitioner engagement in supervision

Low latency optical switch for high performance computing with minimized processor energy load [Invited]

Power density and cooling issues are limiting the performance of high performance chip multiprocessors (CMPs), and off-chip communications currently consume more than 20% of power for memory, coherence, PCI, and Ethernet links. Photonic transceivers integrated with CMPs are being developed to overcome these issues, potentially allowing low hop count switched connections between chips or data center servers. However, latency in setting up optical connections is critically important in all computing applications, and having transceivers integrated on the processor chip also pushes other network functions and their associated power consumption onto the chip. In this paper, we propose a low latency optical switch architecture that minimizes the power consumed on the processor chip for two scenarios: multiple-socket shared memory coherence networks and optical top-of-rack switches for data centers. The switch architecture reduces power consumed on the CMP using a control plane with a simplified send and forget server interface and the use of a hybrid Mach–Zehnder interferometer and semiconductor optical amplifier integrated optical switch with electronic buffering. Results show that the proposed architecture offers a 42% reduction in head latency at low loads compared with a conventional scheduled optical switch as well as offering increased performance for streaming and incast traffic patterns. Power dissipated on the server chip is shown to be reduced by more than 60% compared with a scheduled optical switch architecture with ring resonator switching.This work was supported by the UK Engineering and Physical Sciences Research Council (EPSRC) INTERNET program grant and an EPSRC Fellowship grant to Philip Watts. Both University College London and the University of Cambridge are members of GreenTouch.This paper was published in the Journal of Optical Communications and Networking and is made available as an electronic reprint with the permission of OSA. The paper can be found at the following URL on the OSA website: http://www.opticsinfobase.org/jocn/abstract.cfm?uri=jocn-7-3-A498. Systematic or multiple reproduction or distribution to multiple locations via electronic or other means is prohibited and is subject to penalties under law. This is the accepted manuscript of a paper published in the Journal of Optical Communications and Networking, Vol. 7, Issue 3, pp. A498-A510 (2015) http://dx.doi.org/10.1364/JOCN.7.00A49

The Primary Spin-4 Casimir Operators in the Holographic SO(N) Coset Minimal Models

Starting from SO(N) current algebra, we construct two lowest primary higher spin-4 Casimir operators which are quartic in spin-1 fields. For N is odd, one of them corresponds to the current in the WB_{\frac{N-1}{2}} minimal model. For N is even, the other corresponds to the current in the WD_{\frac{N}{2}} minimal model. These primary higher spin currents, the generators of wedge subalgebra, are obtained from the operator product expansion of fermionic (or bosonic) primary spin-N/2 field with itself in each minimal model respectively. We obtain, indirectly, the three-point functions with two real scalars, in the large N 't Hooft limit, for all values of the 't Hooft coupling which should be dual to the three-point functions in the higher spin AdS_3 gravity with matter.Comment: 65 pages; present the main results only and to appear in JHEP where one can see the Appendi

The Coset Spin-4 Casimir Operator and Its Three-Point Functions with Scalars

We find the GKO coset construction of the dimension 4 Casimir operator that contains the quartic WZW currents contracted with completely symmetric SU(N) invariant tensors of ranks 4, 3, and 2. The requirements, that the operator product expansion with the diagonal current is regular and it should be primary under the coset Virasoro generator of dimension 2, fix all the coefficients in spin-4 current, up to two unknown coefficients. The operator product expansion of coset primary spin-3 field with itself fixes them completely. We compute the three-point functions with scalars for all values of the 't Hooft coupling in the large N limit. At fixed 't Hooft coupling, these three-point functions are dual to that found by Chang and Yin recently in the undeformed AdS_3 bulk theory (higher spin gravity with matter).Comment: 65 pages; the ambiguity for the two coefficient functions is clarified and the abstract, the introduction, the subsection 3.4 and the conclusion are improved and to appear in JHE

Low Latency Scheduling Algorithm for Shared Memory Communications over Optical Networks

Optical Network on Chips (NoCs) based on silicon photonics have been proposed to reduce latency and power consumption in future chip multi-core processors (CMP). However, high performance CMPs use a shared memory model which generates large numbers of short messages, typically of the order of 8-256B. Messages of this length create high overhead for optical switching systems due to arbitration and switching times. Current schemes only start the arbitration process when the message arrives at the input buffer of the network. In this paper, we propose a scheme which intelligently uses the information from the memory controllers to schedule optical paths. We identified predictable patterns of messages associated with memory operations for a 32 core x86 system using the MESI coherency protocol. We used the first message of each pattern to open the optical paths which will be used by all subsequent messages thereby eliminating arbitration time for the latter. Without considering the initial request message, this scheme can therefore reduce the time of flight of a data message in the network by 29% and that of a control message by 67%. We demonstrate the benefits of this scheduling algorithm for applications in the PARSEC benchmark suite with overall average reductions in overhead latency per message, of 31.8% for the streamcluster benchmark and 70.6% for the swaptions benchmark

Optical frequency synthesizer with an integrated erbium tunable laser.

Optical frequency synthesizers have widespread applications in optical spectroscopy, frequency metrology, and many other fields. However, their applicability is currently limited by size, cost, and power consumption. Silicon photonics technology, which is compatible with complementary-metal-oxide-semiconductor fabrication processes, provides a low-cost, compact size, lightweight, and low-power-consumption solution. In this work, we demonstrate an optical frequency synthesizer using a fully integrated silicon-based tunable laser. The synthesizer can be self-calibrated by tuning the repetition rate of the internal mode-locked laser. A 20 nm tuning range from 1544 to 1564 nm is achieved with ~10-13 frequency instability at 10 s averaging time. Its flexibility and fast reconfigurability are also demonstrated by fine tuning the synthesizer and generating arbitrary specified patterns over time-frequency coordinates. This work promotes the frequency stability of silicon-based integrated tunable lasers and paves the way toward chip-scale low-cost optical frequency synthesizers