Video Decoder Reconfigurations and AVS Extensions in the New MPEG Reconfigurable Video Coding Framework

In 2004, ISO/IEC SC29 better known as MPEG started a new standard initiative aiming at facilitating the deployment of multi-format video codec design and to enable the possibility of reconfiguring video codecs using a library of standard components. The new standard under development is called MPEG Reconfigurable Video Coding (RVC) framework. Whereas video coding tools are specified in the RVC library, when a new decoder is reconfigured choosing in principle any (sub)-set of tools, the corresponding bitstream syntax, described using MPEG-21 BSDL schema, and the associated parser need to be respectively derived and instantiated reconfiguration by reconfiguration. Therefore, the development of an efficient systematic procedure able to instantiate efficient bitstream parsing and particularly variable length decoding is an important component in RVC. This paper introduces an efficient data flow based implementation of the variable length decoding (VLD) process particularly adapted for the instantiation and synthesis of CAL parsers in the MPEG RVC framework

Scheduling Of Dataflow Models Within The Reconfigurable Video Coding Framework

The upcoming Reconfigurable Video Coding (RVC) standard from MPEG (ISO/IEC SC29WG11) defines a library of coding tools to specify existing or new compressed video formats and decoders. The coding tool library has been written in a dataflow/actor-oriented language named CAL. Each coding tool can be represented with an extended finite state machine and the dependencies between the tools are described as dataflow graphs. This paper proposes an approach to derive a multiprocessor execution schedule for RVC systems that are comprised of CAL actors. In addition to proposing a scheduling approach for RVC, an extension to the well-known permutation flow shop scheduling problem that enables rapid run-time scheduling of RVC tasks is introduced

Efficient Data Flow Variable Length Decoding Implementation for the MPEG Reconfigurable Video Coding Framework

In 2004, ISO/IEC SC29 better known as MPEG started a new standard initiative aiming at facilitating the deployment of multi-format video codec design and to enable the possibility of reconfiguring video codecs using a library of standard components. The new standard under development is called MPEG Reconfigurable Video Coding (RVC) framework. Whereas video coding tools are specified in the RVC library, when a new decoder is reconfigured choosing in principle any (sub)-set of tools, the corresponding bitstream syntax, described using MPEG-21 BSDL schema, and the associated parser need to be respectively derived and instantiated reconfiguration by reconfiguration. Therefore, the development of an efficient systematic procedure able to instantiate efficient bitstream parsing and particularly variable length decoding is an important component in RVC. This paper introduces an efficient data flow based implementation of the variable length decoding (VLD) process particularly adapted for the instantiation and synthesis of CAL parsers in the MPEG RVC framework

Dataflow/Actor-Oriented language for the design of complex signal processing systems

Signal processing algorithms become more and more complex and the algorithm architecture adaptation and design processes cannot any longer rely only on the intuition of the designers to build efficient systems. Specific tools and methods are needed to cope with the increasing complexity of both algorithms and platforms. This paper presents a new framework which allows the specification, design, simulation and implementation of a system operating at a higher level of abstraction compared to current approaches. The framework is base on the usage of a new actor/dataflow oriented language called CAL. Such language has been specifically designed for modelling complex signal processing systems. CAL data flow models expose the intrinsic concurrency of the algorithms by employing the notions of actor programming and dataflow. Concurrency and parallelism are very important aspects of embedded system design as we enter in the multicore era. The design framework is composed by a simulation platform and by Cal2C and CAL2HDL code generators. This paper described in details the principles on which such code generators are based and shows how efficient software (C) and hardware (VHDL and Verilog) code can be generated by appropriate CAL models. Results on a real design case, a MPEG-4 Simple Profile decoder, show that systems obtained with the hardware code generator outperform the hand written VHDL version both in terms of performance and resource usage. Concerning the C code generator results, the results show that the synthesized C-software mapped on a SystemC scheduler platform, is much faster than the simulated CAL dataflow program and approaches handwritten C versions

MPEG Reconfigurable Video Coding

Traditional efforts in standardizing video coding used to involve a lengthy process that resulted in large monolithic standards and reference codes. This approach has become increasingly ill-suited to the dynamics and the fast changing needs of the video coding community. Most importantly, there used to be no principled approach to leveraging the significant commonalities between the different codecs, neither at the level of the specification nor at the level of the implementation. The result is a long interval between the time a new idea is validated and the time it is implemented in consumer products as part of a worldwide standard. The analysis of this problem was the starting point of a new standard initiative within the ISO/IEC MPEG committee, called Reconfigurable Video Coding (RVC). The main idea is to develop a video coding standard that overcomes many shortcomings of the current standardization and specification process by updating and progressively incrementing a modular library of components. As the name implies, flexibility and reconfigurability are new attractive features of the RVC standard. The RVC framework is based on the usage of a new actor/dataflow oriented language called Cal for the specification of the standard library and the instantiation of the RVC decoder model. Cal dataflow models expose the intrinsic concurrency of the algorithms by employing the notions of actor programming and dataflow. This chapter gives an overview of the concepts and technologies building the standard RVC framework and the non-standard tools supporting the RVC model from the instantiation and simulation of the Cal model to the software and/or hardware code synthesis