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Analysis and Geometric Optimization of Single Electron Transistors for Read-Out in Solid-State Quantum Computing
The single electron transistor (SET) offers unparalled opportunities as a
nano-scale electrometer, capable of measuring sub-electron charge variations.
SETs have been proposed for read-out schema in solid-state quantum computing
where quantum information processing outcomes depend on the location of a
single electron on nearby quantum dots. In this paper we investigate various
geometries of a SET in order to maximize the device's sensitivity to charge
transfer between quantum dots. Through the use of finite element modeling we
model the materials and geometries of an Al/Al2O3 SET measuring the state of
quantum dots in the Si substrate beneath. The investigation is motivated by the
quest to build a scalable quantum computer, though the methodology used is
primarily that of circuit theory. As such we provide useful techniques for any
electronic device operating at the classical/quantum interface.Comment: 13 pages, 17 figure
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