Improving Gold/Gold Microcontact Performance and Reliability Under Low-Frequency AC Through Circuit Loading

This paper investigates the performance and reliability of microcontacts under low-frequency and low-amplitude ac test conditions. Current microcontact theory is based on dc tests adapted to RF applications. To help better apply dc theory to RF applications, frequencies between 100 Hz to 100 kHz were experimentally investigated. Microcontacts designed to conduct performance and reliability measurements were used, which in prior dc testing typically lasted for 100 million cycles or more. Under ac loads, at similar power levels, eight devices were tested under cold-switching conditions, and only one was still operational at 10 million cycles. The effect of external circuitry on dc loaded devices was also considered. The experimental data were presented for dc conditions, which demonstrated that both a parallel capacitance with a microcontact and a series inductance were highly detrimental. For all six tested devices, failure occurred typically in 100 thousand cycles or less. However, utilizing series resistive/capacitive circuits as well as parallel resistor/inductive resulted in improved performance, with only one device of the four tested failing prematurely, but those that lasted showed less variation in measure contact resistance throughout the lifetime of the device. Two devices were tested with passive contact protection using parallel and series resistances, and both devices lasted for the full test duration. Finally, the effects of applying circuit protection to microcontacts and repeating ac test conditions were investigated. Reliability and device lifetime were extended significantly (9.1% success rate without protection was increased to 87% success rate). It was also observed in several instances that devices that failed showed subtle signs of variance during contact closure measurements in the range of 5-30 μ N, indicating a possible means for accurately predicting device failure. For these failed devices, notable physical damage was observed using a scanning electron microscope

Chip to Chip Optical Interconnection Using MEMS Mirrors

This experiment explores the use of MEMS mirrors to direct subsurface optical signals to another device and reception of those signals for use in chip to chip communications. Devices were built in PolyMUMPs to control horizontal and vertical beam direction and tilting in the outgoing signal and MEMS beam splitters for the incoming signal. Several elements of the outgoing beam path were successful and those which needed improvement indicate a high probability of success with limited trials needed and currently successful design elements could still be improved within the scope of PolyMUMPs. The incoming beam path elements were not successful as designed and would require the flip chip bonding unit now available at AFIT, or could be realized with a high probability of success and minimal design work with a more sophisticated fabrication process (such as SUMMiT)

Integrating Nanosphere Lithography in Device Fabrication

This paper discusses the integration of nanosphere lithography (NSL) with other fabrication techniques, allowing for nano-scaled features to be realized within larger microelectromechanical system (MEMS) based devices. Nanosphere self-patterning methods have been researched for over three decades, but typically not for use as a lithography process. Only recently has progress been made towards integrating many of the best practices from these publications and determining a process that yields large areas of coverage, with repeatability and enabled a process for precise placement of nanospheres relative to other features. Discussed are two of the more common self-patterning methods used in NSL (i.e. spin-coating and dip coating) as well as a more recently conceived variation of dip coating. Recent work has suggested the repeatability of any method depends on a number of variables, so to better understand how these variables affect the process a series of test vessels were developed and fabricated. Commercially available 3-D printing technology was used to incrementally alter the test vessels allowing for each variable to be investigated individually. With these deposition vessels, NSL can now be used in conjunction with other fabrication steps to integrate features otherwise unattainable through current methods, within the overall fabrication process of larger MEMS devices. Patterned regions in 1800 series photoresist with a thickness of ~700nm are used to capture regions of self-assembled nanospheres. These regions are roughly 2-5 microns in width, and are able to control the placement of 500nm polystyrene spheres by controlling where monolayer self-assembly occurs. The resulting combination of photoresist and nanospheres can then be used with traditional deposition or etch methods to utilize these fine scale features in the overall design

Improvements to Micro-Contact Performance and Reliability

Microelectromechanical Systems (MEMS) based devices, and specifically microswitches, continue to offer many advantages over competing technologies. To realize the benefits of micro-switches, improvements must be made to address performance and reliability shortfalls which have long been an issue with this application. To improve the performance of these devices, the micro-contacts used in this technology must be understood to allow for design improvements, and offer a means for testing to validate this technology and determine when such improvements are ready for operational environments. To build devices which are more robust and capable of continued operation after billions of cycles requires that improved fabrication techniques be identified and perfected to allow for more sophisticated designs to be tested

MEMS Variable Area Capacitor for Room Temperature Electrometry

This paper introduces a new way to detect charge using MEMS variable capacitors for extremely sensitive, room temperature electrometry. It is largely based on the electrometers introduced by Riehl et al. [1] except variable capacitance is created by a changing area, not a changing gap. The new scheme will improve MEMS electrometers by eliminating the effects of squeeze-film damping and by theoretically increasing the maximum charge resolution by 70%. The charge conversion gain (the increase in output voltage per input unit charge) for this system is derived. The result show good agreement with MATLAB calculations

Engineered surfaces to control secondary electron emission for multipactor suppression

A significant problem for space-based systems is multipactor - an avalanche of electrons caused by repeated secondary electron emission (SEE). The consequences of multipactor range from altering the operation of radio frequency (RF) devices to permanent device damage. Existing efforts to suppress multipactor rely heavily on limiting power levels below a multipactor threshold [1]. This research applies surface micromachining techniques to create porous surfaces to control the secondary electron yield (SEY) of a material for multipactor suppression. Surface characteristics of interest include pore aspect ratio and density. A discussion is provided on the advantage of using electroplating (vice etching) to create porous surfaces for studying the relationships between SEY and pore aspect ratio & density (i.e. porosity). Preventing multipactor through SEY reduction will allow power level restrictions to be eased, leading to more powerful and capable space-based systems

Experimental Validation of External Load Effects on Micro-Contact Performance and Reliability

This paper presents a follow-on study previously presented at the Holm Conference. In the previous work, it was theorized that micro-switch performance and reliability was directly related to the type of external load that was connected. In particular, unintended capacitive loads may discharge at unpredictable times during switch operation and severely degrade or destroy micro-contact surfaces while properly configured loads may actually enhance performance. The severity of this potential vulnerability can be mitigated by purposely including specific circuit elements in various load configurations. This current study is to experimentally investigate and analyze this phenomenon. Using microelectromechanical systems (MEMS) based devices, we have the ability to efficiently and inexpensively fabricate large numbers of identical micro-contact pairs and then connect them to external loads of interest. Using this approach, it was demonstrated that both performance and reliability can be drastically affected by loading. In all cases tested, series inductance and parallel capacitance resulted in premature failure of the micro-contacts tested. Various protective configurations were also tested and all such devices lasted to the targeted 10M cycles of operation with little sign of imminent failure

Surface Feature Engineering through Nanosphere Lithography

How surface geometries can be selectively manipulated through nanosphere lithography (NSL) is discussed. Self-assembled monolayers and multilayers of nanospheres have been studied for decades and have been applied to lithography for almost as long. When compared to the most modern, state-of-the-art techniques, NSL offers comparable feature resolution with many advantages over competing technologies

Modeling Micro-porous Surfaces for Secondary Electron Emission Control to Suppress Multipactor

This work seeks to understand how the topography of a surface can be engineered to control secondary electron emission (SEE) for multipactor suppression. Two unique, semi-empirical models for the secondary electron yield (SEY) of a micro-porous surface are derived and compared. The first model is based on a two-dimensional (2D) pore geometry. The second model is based on a three-dimensional (3D) pore geometry. The SEY of both models is shown to depend on two categories of surface parameters: chemistry and topography. An important parameter in these models is the probability of electron emissions to escape the surface pores. This probability is shown by both models to depend exclusively on the aspect ratio of the pore (the ratio of the pore height to the pore diameter). The increased accuracy of the 3D model (compared to the 2D model) results in lower electron escape probabilities with the greatest reductions occurring for aspect ratios less than two. In order to validate these models, a variety of micro-porous gold surfaces were designed and fabricated using photolithography and electroplating processes. The use of an additive metal-deposition process (instead of the more commonly used subtractive metal-etch process) provided geometrically ideal pores which were necessary to accurately assess the 2D and 3D models. Comparison of the experimentally measured SEY data with model predictions from both the 2D and 3D models illustrates the improved accuracy of the 3D model. For a micro-porous gold surface consisting of pores with aspect ratios of two and a 50% pore density, the 3D model predicts that the maximum total SEY will be one. This provides optimal engineered surface design objectives to pursue for multipactor suppression using gold surfaces. © 2017 Author(s)

Modeling Micro-Porous Surfaces for Secondary Electron Emission Control to Suppress Multipactor

This work seeks to understand how the topography of a surface can be engineered to control secondary electron emission (SEE) for multipactor suppression. Two unique, semi-empirical models for the secondary electron yield (SEY) of a micro-porous surface are derived and compared. The first model is based on a two-dimensional (2D) pore geometry. The second model is based on a three-dimensional (3D) pore geometry. The SEY of both models is shown to depend on two categories of surface parameters: chemistry and topography. An important parameter in these models is the probability of electron emissions to escape the surface pores. This probability is shown by both models to depend exclusively on the aspect ratio of the pore (the ratio of the pore height to the pore diameter). The increased accuracy of the 3D model (compared to the 2D model) results in lower electron escape probabilities with the greatest reductions occurring for aspect ratios less than two. In order to validate these models, a variety of micro-porous gold surfaces were designed and fabricated using photolithography and electroplating processes. The use of an additive metal-deposition process (instead of the more commonly used subtractive metal-etch process) provided geometrically ideal pores which were necessary to accurately assess the 2D and 3D models. Comparison of the experimentally measured SEY data with model predictions from both the 2D and 3D models illustrates the improved accuracy of the 3D model. For a micro-porous gold surface consisting of pores with aspect ratios of two and a 50% pore density, the 3D model predicts that the maximum total SEY will be one. This provides optimal engineered surface design objectives to pursue for multipactor suppression using gold surfaces