Cryptanalysis of the rsa subgroup assumption from TCC 2005

Abstract. At TCC 2005, Groth underlined the usefulness of working in small RSA subgroups of hidden order. In assessing the security of the relevant hard problems, however, the best attack considered for a subgroup of size 2 2ℓ had a complexity of O(2 ℓ). Accordingly, ℓ = 100 bits was suggested as a concrete parameter. This paper exhibits an attack with a complexity of roughly 2 ℓ/2 operations, suggesting that Groth’s original choice of parameters was overly aggressive. It also discusses the practicality of this new attack and various implementation issues. Key-words: rsa moduli, hidden order, subgroup, cryptanalysis.

Spectral estimation for long-term evolution transceivers using low-complex filter banks

For mobile user equipments (UEs), a careful power management is essential. Despite this fact, quite an amount of energy is wasted in today's UEs’ analogue (AFEs) and digital frontends (DFEs). These are engineered for extracting the wanted signal from a spectral environment defined in the corresponding communication standards with their extremely tough requirements. These requirements define a worst-case scenario still ensuring reliable communication. In a typical receiving process the actual requirements can be considered as less critical. Knowledge about the actual environmental spectral conditions allows to reconfigure both frontends to the actual needs and to save energy. In this paper, the authors present a highly efficient generic spectrum sensing approach, which allows to collect information about the actual spectral environment of an UE. This information can be used to reconfigure both the AFE and DFE, thus endowing them with increased intelligence. A low-complex multiplier free filter bank extended by an efficient power calculation unit will be introduced. They also present simulation results, which illustrate the performance of the spectrum sensing approach and a complexity comparison with different well-known implementations is given. Furthermore, estimates on the chip area and power consumption based on a 65 nm CMOS technology database are provided, considering the Smarti4G chip as a reference