Infertility and social issue have the most significant impact on health-related quality of life among polycystic ovarian syndrome women in South India

Background: Infertility can have a significant impact on the identity of women. Individual women, who are infertile, experience tragic emotions, as well as those who are sad for great losses, like the death of a loved one. In this case, the woman is experiencing the loss of the ability to procreate. Aim: In the present study, our major concern was to implement the health-related quality of life (HRQOL) Questionnaire on South Indian polycystic ovarian syndrome (PCOS) women to assess the impact of various clinical features of polycystic ovary syndrome on the HRQOL of South Indian women diagnosed. Settings and Design: A total of 126 females in the first phase and 356 females in the second phase between the age group of 18–40 years characterised under the Rotterdam criteria were selected for the study. Materials and Methods: The study was carried out in three different phases which included a one-to-one interview, group discussion and questionnaire session. In our study, we found that all the females who attend the study showed positivity for all the domains developed in the previous study and suggested that further domain can be developed. Statistical Analysis Used: Suitable statistical methods were used with Graph pad PRISM (version 6). Results: Hence, in our study, we developed a further new sixth domain called as 'social impact domain'. Among South Indian PCOS women, we found that infertility and social issue have the most significant impact on HRQOL. Conclusion: The revised questionnaire by including the sixth domain called 'Social issue' is likely to be useful in measuring the quality of health of female having PCOS in regard to South Indian population

Ultra-low power analog-digital converters for IoT

This chapter addresses ADCs for IoT nodes, which are needed to digitize sensor information before processing, storage or wireless transmission. ADCs are also required for the radio communication channel. This chapter focusses on successive approximation (SAR) ADCs, a popular architecture for IoT thanks to their high power-efficiency. After deriving requirements for IoT, the design basics of SAR ADCs are discussed, followed by various design examples to illustrate key enabling techniques

Nanopower SAR ADCs with Reference Voltage Generation

This chapter targets low-power techniques for nanopower SAR ADCs with reference voltage generation. First of all, a 106nW 10b 80 kS/s SAR ADC with duty-cycled reference generation is presented, where a CMOS voltage reference, a duty-cycling block, and a LDO are integrated with the SAR ADC together. Furthermore, a low-power bidirectional comparator is utilized in the SAR ADC to reduce the power consumption. The reference-included SAR ADC achieves a FoM of 2.4fJ/conv.-step. Second, an energy-free DAC reset technique, “swap-to-reset,” is presented to deal with the large DAC reset energy in a SAR ADC, which is usually large compared with DAC conversion energy. In the prototype, the DAC energy consumption is reduced by one-third with “swap-to-reset” applied to the 2 MSBs. Finally, a low-power and area-efficient discrete-time reference driver is introduced. By calculating the energy consumption of each switching step, the DAC in a SAR ADC can be driven by a pre-charged decoupling capacitor compensated by a small auxiliary DAC. In the prototype, the SNDR/SFDR are improved by 2.7 dB/11.6 dB after enabling the 3b DAC compensation and the discrete-time reference driver only adds 10.8% and 10.1% to the power and chip area of the SAR ADC, respectively.</p