Ion Implantation of Porous Silicon

Investigates the ion implantation of porous silicon (Si). Properties of light-emitting Si; Application of continuous-wave and time dependent photoluminescence spectroscopies; Comparison of dopant implantation effect in varying doses

Luminescence Properties of Thin Film Ta2 Zn3 O8 and Mn Doped Ta2 Zn3 O8

Blue luminescence from TaZZn30g and green luminescence from Mn doped TaZZn30g has been observed under low voltage cathodoluminescent excitation, In this article , the luminescence mechanisms of TaZZn30g and Mn doped TaZZn30 g are discussed in detail. The results suggest that the intrinsic blue luminescence of TaZZn30g results from a metal-to-ligand transition, whereas the green luminescence of Mn doped TaZZn30g results from the Mn 4T 1-6A I transition. The suppression of the blue intrinsic luminescence in Mn doped TaZZn30g suggests that efficient energy transfer from the host material to the Mn occurs. This energy transfer phenomenon is also discussed by comparing the photoluminescence excitation spectra of both thin film materials. Finally, the relative efficiency versus voltage and current density is demonstrated and discussed pertaining to field emission device operation

Three-Terminal Si-Based Negative Differential Resistance Circuit Element with Adjustable Peak-to-Valley Current Ratios Using a Monolithic Vertical Integration

Si-based resonant bipolar transistors are demonstrated by the monolithic vertical integration of Si-based resonant interband tunnel diodes atop the emitter of Si/SiGe heterojunction bipolar transistors ~HBTs! on a silicon substrate. In the common emitter configuration, IC versus VCE shows negative differential resistance characteristics. The resulting characteristics are adjustable peak-to-valley current ratios, including infinite and negative values, and tailorable peak current densities by the control of the HBT base current under room temperature operation. With the integrated RITD-HBT combination, latching properties which are the key operating principle for high-speed mixed-signal, memory, and logic circuitry, are experimentally demonstrated

Monitoring a photovoltaic system during the partial solar eclipse of August 2017

The power output of a 4.85 kW residential photovoltaic (PV) system located in Rochester, NY is monitored during the partial solar eclipse of August 21, 2017. The data is compared with the data on a day before and on the same day, a year ago. The area of exposed solar disk is measured using astrophotography every 16 s of the eclipse. Global solar irradiance is estimated using the eclipse shading, time of the day, location coordinates, atmospheric conditions and panel orientation. A sharp decline, as expected in the energy produced is observed at the time of the peak of the eclipse. The observed data of the PV energy produced is related with the model calculations taking into account solar eclipse coverage and cloudiness conditions. The paper provides a cohesive approach of irradiance calculations and obtaining anticipated PV performance

Monitoring a photovoltaic system during the partial solar eclipse of August 2017

The power output of a 4.85 kW residential photovoltaic (PV) system located in Rochester, NY is monitored during the partial solar eclipse of August 21, 2017. The data is compared with the data on a day before and on the same day, a year ago. The area of exposed solar disk is measured using astrophotography every 16 s of the eclipse. Global solar irradiance is estimated using the eclipse shading, time of the day, location coordinates, atmospheric conditions and panel orientation. A sharp decline, as expected in the energy produced is observed at the time of the peak of the eclipse. The observed data of the PV energy produced is related with the model calculations taking into account solar eclipse coverage and cloudiness conditions. The paper provides a cohesive approach of irradiance calculations and obtaining anticipated PV performance

QUANTUM AND SPIN TUNNEL DEVICES FOR MEMORY APPLICATIONS

The increasing trend towards portable digital electronics and wireless communication devices has driven the advancement of several memory technologies in the last couple of decades. The standards of performance are becoming more stringent, posing several challenges from device design, circuit architecture, and manufacturing capability. The current commercially available memory devices, such as SRAM, DRAM, and Flash, offer enhanced performance in one aspect while sacrificing on other areas. Memory technologies that utilize quantum tunneling based devices, such as tunneling diodes have been sought as a viable solution. The tunneling property allows for fast switching. The low operating voltage results in low standby power. Recent breakthroughs by the authors in monolithic integration of SiGe resonant interband tunnel diodes (RITDs) with CMOS devices offer novel architectures for memory applications. The latest developments demonstrated a refresh-free Si-based tunneling static random access memory (TSRAM), exhibiting an enhanced signal to noise ratio. In addition, its basic cell can be expanded into a multi-level memory by utilizing several tunnel diodes connected in series. This would substantially increase memor

Investigation of Inter-Diffusion in Bilayer GeTe/SnSe Phase Change Memory Films

A metal-chalcogenide layer, SnSe, is inserted between the memory layer GeTe and the top electrode to form a phase change memory cell. The GeTe layer exhibits ovonic threshold switching at a threshold field of ~ 110 V/μm. For subsequent implementation into applications and reliability, material inter-diffusion and sublimation are examined in bilayer phase change films of GeTe/SnSe. Transmission electron microscopy and parallel electron energy loss spectroscopy analyses reveal Sn migration to the GeTe layer, which is responsible for lowering the rhombohedral to cubic structural transformation temperature in GeTe. Incongruent sublimation of SnSe and GeTe is observed at temperatures higher than 500 °C. Severe volatilization of Se results in the separation of a metallic Sn phase. The use of Al2O3 as a capping layer has been found to mitigate these effects

Diffusion barrier cladding in Si/SiGe resonant interband tunneling diodes and their patterned growth on PMOS source/drain regions

Abstract—Si/SiGe resonant interband tunnel diodes (RITDs) employing-doping spikes that demonstrate negative differential resistance (NDR) at room temperature are presented. Efforts have focused on improving the tunnel diode peak-to-valley current ratio (PVCR) figure-of-merit, as well as addressing issues of manufacturability and CMOS integration. Thin SiGe layers sandwiching the B-doping spike used to suppress B out-diffusion are discussed. A room-temperature PVCR of 3.6 was measured with a peak current density of 0.3 kA/cmP. Results clearly show that by introducing SiGe layers to clad the B-doping layer, B diffusion is suppressed during post-growth annealing, which raises the thermal budget. A higher RTA temperature appears to be more effective in reducing defects and results in a lower valley current and higher PVCR. RITDs grown by selective area molecular beam epitaxy (MBE) have been realized inside of low-temperature oxide openings, with performance comparable with RITDs grown on bulk substrates. Index Terms—CMOS compatibilty, dopant diffusion, Ge-Si alloys, low-temperature oxide, molecular beam epitaxy, negative differential resistance, patterned growth, rapid thermal annealing, resonant interband tunneling diodes, silicon. I