119 research outputs found
Analog VLSI neural network integrated circuits
Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit
Convergence Analysis and Analog Circuit Applications for a Class of Networks of Nonlinear Coupled Oscillators
The physical motivation and rigorous proof of convergence for a particular network of nonlinear coupled oscillators are reviewed. Next, the network and convergence proof are generalized in several ways, to make the network more applicable to actual engineering problems. It is argued that such coupled oscillator circuits are more natural to implement in analog hardware than other types of dynamical equations because the signal levels tend to remain at sufficiently large values that effects of offsets and mismatch are minimized. Examples of how analog implementations of these networks are able to address actual control problems are given. The first example shows how a pair of coupled oscillators can be used to compensate for the feedback path phase shift in a complex LMS loop, and has potential application for analog adaptive antenna arrays or linear predictor circuits. The second example shows how a single oscillator circuit with feedback could be used for continuous wavelet transform applications. Finally, analog CMOS implementation of the coupled oscillator dynamics is briefly discussed
Temporary Bonding with Polydimethylglutarimide Based Lift Off Resist as a Layer Transfer Platform
Bonding of lift off resist (LOR) was performed to realize temporary wafer bonding without residue. Bonding process conditions such as spin speed, pre-bake temperature, and bonding temperature were optimized to obtain a large bonded area with high bond strength. Under optimized process conditions, a bonded area covering over 98% of the wafer surface, with a room temperature bond strength of nearly 5 J/m2 is achieved. During razor blade testing, fracture often occurs at the Si wafer. Moreover, debonding using an N-Methyl-2-pyrrolidone (NMP)-based solvent left the wafer surface extremely small amount of residue. Thus, the optimized bonding processed developed in this research is suitable for a clean temporary bonding process
Profiling the temperature distribution in AlGaN/GaN HEMTs with nanocrystalline diamond heat spreading layers
Reduced performance in Gallium Nitride (GaN) based high electron mobility transistors (HEMTs) as a result of self-heating has been well-documented. A new approach, termed
“diamond-before-gate" is shown to improve the thermal budget of the deposition process and enables large area diamond without degrading the gate metal NCD capped devices had a 20% lower channel temperature at equivalent power dissipation
Vertical conduction properties of few-layer epitaxial graphene / n-type 4H-SiC heterojunctions at cryogenic temperatures
Vertical diodes of epitaxial graphene on n 4H-SiC were investigated. The graphene Raman spectraexhibited a higher intensity in the G-line than the 2D-line, indicative of a few-layer graphene film.Rectifying properties improved at low temperatures as the reverse leakage decreased over six ordersof magnitude without freeze-out in either material. Carrier concentration of 10 16 cm 3in the SiCremained stable down to 15 K, while accumulation charge decreased and depletion width increasedin forward bias. The low barrier height of 0.08 eV and absence of recombination-induced emissionindicated majority carrier field emission as the dominant conduction mechanism
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