A versatile micro-scale silicon sensor/actuator with low power consumption

We designed a CMOS compatible hot-surface silicon device operating at a power down to sub-µW. It has a pillarshaped structure with a nano-size (10-100 nm) conductive link between the electrodes separated by a SiO2 layer. The device is capable of maintaining a µm-size hot-surface area of several hundred degrees centigrade due to non-radiative recombination of carriers in a thin (13 nm) poly silicon surface layer. Such a device can be used as a light source, a heat source, as well as a sensitive detector of light and heat. As a direct application, we demonstrate the feasibility to perform as an adsorption-desorption sensor, and as a unit for activating chemisorption/decomposition (i.e. micro-reactor)

On the effect of nano-injectors on conduction in silicon p-i-n diodes

P–i–n diodes are widely used in power electronics [1-2], solar cells [3], light detection [4] and also light generation [5]. Contrary to the case of light detection or conversion, light generation is usually achieved by biasing the device in forward mode, in a condition of carrier injection. Depending on its level, the device can operate in regimes controlled by respectively generation/recombination current, diffusion current or the so called series resistance [6]. The injection level also controls the balance between the recombination mechanisms, and it is commonly controlled via the applied bias, which could be fixed by the specific application rather then being a free parameter. A possible approach to better control the injection level is to modify the features of the carrier injectors, for instance by thinning down the junction area [7] or reducing the injectors itself to a nanometer scale [8]. A practical way to realize nano-injectors is to embed the intrinsic region in oxide and create the connection between the intrinsic region and the two extension regions via antifuses, as realized in [9]. The size and properties of the antifuses can be controlled electrically, making it suitable to analyze the effects of progressive scaling of the dimensions of carrier injectors. In this work, we compare electrical behaviors of a standard p-i-n diode with antifuse p-i-n diodes programmed at different conditions. Electrical I-V measurements are performed at temperatures between -20 and 200 °C (I-V-T characteristics) in order to investigate the dominant mechanisms in the conduction

A pillar-shaped antifuse-based silicon chemical sensor and actuator

We designed a silicon-processing compatible, simple, and cheap device operating at a power down to sub- W. It has a pillar-shaped structure with a nanoscopic (10–100 nm in size) conductive link (the so-called antifuse) created between two electrodes separated by a SiO2 layer. The device exhibits a diode-like behavior due to the depletion effects in the mono-silicon pillar. The device is capable of maintaining a microscopic hot-surface area of several hundreds degrees centigrade. The size of the hot area and its temperature can be manipulated by the sign of the applied bias.\ud Two different heat-generation mechanisms (i.e., dissipation at a resistor and a non-radiative recombination of carriers) are proposed and modelled. Such a device can be used as a heat source, as a light source, and as a sensitive detector of light and heat. In this paper, we describe thermo-electrical properties of the fabricated devices and demonstrate their feasibility to perform as gas-, adsorption-, desorption sensors, and as units for activating chemisorption/decomposition of gaseous precursors, i.e., micro-reactors.\u

A novel approach to low-power hot-surface devices with decoupled electrical and thermal resistances

This work employs the idea of maintaining a hot surface by means of dissipating power at a nano-scale conductive link. The link is created between two polysilicon electrodes separated by a dielectric (a capacitor-like structure). From modelling, a link of 10 nm in diameter should be possible to maintain the surface temperature ranging between 750 and 1150 K within the surface diameter of 2 μm by absorbing a 3.3 mW of electric power. The devices can also be designed in such a way that the hot surface area is reduced to a sub-μm-size hotspot. The main advantage of the proposed idea is decoupling the electrical resistance and thermal resistance of the device. In this paper, two device structures based on antifuse technology are described. Both the thermo-electrical properties and feasibility to perform as a Pellistor-type gas sensor are discussed

Four point probe structures with buried electrodes for the electrical characterization of ultrathin conducting films

Test structures for the electrical characterization of ultrathin conductive (ALD) films are presented based on buried electrodes on which the ultrathin film is deposited.\ud This work includes test structure design and fabrication, and the electrical characterization of ALD TiN films down to 4 nm. It is shown that these structures can be used successfully to characterize sub 10 nm films.\u

Gate Oxide Reliability and Deuterated CMOS Processing

In recent literature, a controversy has arisen over the question whether deuterium improves the stability of the MOS gate dielectric. It appears as if this controversy finds its origin in the different stages (e.g. oxidation or post metal anneal) deuterium is introduced in the CMOS process. This paper investigates this in detail. The obtained results show that the hot carrier degradation only benefits from an isotope effect when deuterium is introduced in the post metal anneal. At the same time, charge to breakdown for high quality oxides does not benefit from an isotope effect, regardless of the processing stage deuterium is introduced, or the gate oxide thickness used. This is verified on two different sets of wafers fabricated in two different laboratories

Cross-Bridge Kelvin resistor structures for reliable measurement of low contact resistances and contact interface characterization

The parasitic factors that strongly influence the measurement accuracy of Cross-Bridge Kelvin Resistor (CBKR) structures for low specific contact resistances (rhoc) have been extensively discussed during last few decades and the minimum of the rhoc value, which could be accurately extracted, was estimated. We fabricated a set of various metal-to-metal CBKR structures with different geometries, i.e., shapes and dimensions, to confirm this limit experimentally and to create a method for contact metal-to-metal interface characterization. As a result, a model was developed to account for the actual current flow and a method for reliable rhoc extraction was created. This method allowed to characterize metal-to-metal contact interface. It was found that in the case of ideal metal-to-metal contacts, the measured CBKR contact resistance was determined by the dimensions of the two-metal stack in the area of contact and sheet resistances of the metals used

The Impact of Deuterated CMOS processing on Gate Oxide Reliability

In recent literature, a controversy has arisen over the question whether deuterium improves the stability of the MOS gate dielectric. In particular, the influence of deuterium incorporation on the bulk oxide quality is not clear. In this letter, deuterium or hydrogen is introduced during either the gate oxidation, postoxidation anneal, and/or the postmetal anneal (PMA). The oxide bulk degradation was evaluated using charge-to-breakdown and stress-induced leakage current; and the oxide interface degradation using hot-carrier degradation and low-frequency noise. The obtained results show that the oxide bulk does not benefit from the presence of deuterium, regardless of the stage of deuterium introduction, or the gate oxide thickness. The oxide interface is more stable only when deuterium is introduced in the PMA

On the leakage problem of MIM capacitors due to improper etching of titanium nitride

In this work, Metal-insulator-metal (MIM) capacitor structures are fabricated in a technology using TiN as electrode material. The electrical characterization revealed devices with small and large leakage currents. Scanning Electron Microscopy (SEM) inspection showed a correlation between high leakage currents and large roughness in the dielectric layer of the capacitor. Cross-section of leaky capacitors by means of a Focussed Ion Beam (FIB) showed a rough edge of the bottom electrode and the presence of particles leading to a rough dielectric layer. These artefacts are the result of improper wet chemical etching of the TiN layer. It is shown, high leakage currents and improper etching of the TiN layer are correlated

Systematic TLM Measurements of NiSi and PtSi Specific Contact Resistance to n- and p-Type Si in a Broad Doping Range

We present the data on specific silicide-to-silicon contact resistance (ρc) obtained using optimized transmission-line model structures, processed for a broad range of various n- and p-type Si doping levels, with NiSi and PtSi as the silicides. These structures, despite being attractive candidates for embedding in the CMOS processes, have not been used for NiSi, which is the material of choice in modern technologies. In addition, no database for NiSi–silicon contact resistance exists, particularly for a broad range of doping levels. This letter provides such a database, using PtSi extensively studied earlier as a reference