A study of the bias-temperature instability problem in advanced gate stacks

Negative Bias Temperature Instability (NBTI) on thin and thick PMOSFET with SiON oxide was examined by stressing the devices under different conditions to observe the recovery behavior of NBTI. In this project, experiments were carried out to study the frequency dependent, temperature dependent and device dimension dependent nature of recovery component of NBTI. Although there are numerous research on NBTI, Reaction-Diffusion model (R-D model) that was used to explain NBTI mechanism previously is found to be unable to characterize NBTI. Hydrogen transport across gate oxide is not the key mechanism for generation of bulk oxide traps. The models which focus on the recoverable component in NBTI do not completely explain the decrease in recoverable component (R) at high temperature. Thus, in this project, experiments were conducted by applying DC and AC stresses on thick PMOS device (width=10µm and gate length= 0.06 µm) at temperature 50 degrees C. It was found that more recovery is observed in DC measurement method as compared to AC. As for the AC stresses, the tests were done at different frequencies. It was found that NBTI has reduced frequency dependence in the ultrahigh frequency range as the results showed that at higher frequencies, there is no much difference in the recovery trends. Experiments were also conducted on thin PMOS device (width=0.12µm and gate length= 0.06 µm) to study how the recovery behavior actually varies across different device dimensions. A small- area PMOS device has very few holes trapped and thus the discrete nature of the detrapping events (step height) can be observed on recovery patterns. Lastly, experiments were carried out to observe the temperature impact on the conversion of recoverable component to non- recoverable component. It was found that traps diminish earlier at higher temperature as compared to lower temperature.Bachelor of Engineerin