A two-transistor non-ideal memristor emulator

In this brief, the design and the experimental behavior of a memristor emulator is presented. An npn and a pnp transistor control the switching transition to the low resistance state in forward and reverse input bias, while a capacitor is responsible for the hysteresis loop. The circuit does not need external bias and in this sense it operates in a passive mode. The measured i-v characteristic exhibits a memristive hysteretic loop of Type II. Consequently, this circuit is a non-ideal memristor emulator. © 2016 IEEE