Step-controlled homoepitaxial growth of 4H-SiC on vicinal substrates

A comprehensive study on the step-controlled homoepitaxial growth on the (0001)Si-face of vicinal 4H-SiC substrates was performed in order to establish epitaxial growth on 2° towards <11-20> off-cut substrates and 4° towards <1-100> off-cut substrates. A standard epitaxial growth process was developed by optimizing the growth temperature T, Si/H ratio and C/Si ratio for growth on 4° towards <11-20> off-cut substrates. Thereby, step-controlled epitaxial growth was achieved within a broad operating window. The surface roughness of such epilayers varies typically between rms = 0.5 nm and rms = 2.5 nm and step-controlled growth is conserved even at a growth rate of 27 μm/h. Then, the standard growth process was applied to substrates with different off-cut angles of 2°, 4° and 8° as well as with different off-cut directions <11-20> and <1-100>. The step-controlled growth was achieved also within a wide range of Si/H ratio and C/Si ratio for growth on 8° and 4° off-cut substrates, but the process window narrows strongly for growth on 2° off-cut substrates. The epilayers surface roughness increases with decreasing off-cut angle of the substrate. Epilayers grown on 4° towards <1-100> off-cut substrates were significantly smoother than epilayers grown on 4° towards <11-20> off-cut substrates. No influence of the substrates off-cut angle and direction on the growth rate was found. The experimental results of this comprehensive study are discussed globally in consideration of other relevant publications

Modelling of effective minority carrier lifetime in 4H-SiC n-type epilayers

We present an extended model for the simulation of the effective minority carrier lifetime in 4H-SiC epiwafers after optical excitation. This multilayer model uses measured values (doping profile, point defect concentration, capture cross sections for electrons and epilayer thickness) as input parameters. The bulk lifetime and the diffusion constant are calculated from the actual time dependent excess carrier profiles, resulting in more realistic transients having different decay regimes than in other models. This enables a better understanding of optical lifetime measurements

Experimental verification of the model by Klapper for 4H-SiC homoepitaxy on vicinal substrates

4H-SiC homoepitaxial layers free of basal plane dislocations (BPDs) are urgently needed to overcome the so-called bipolar degradation of high-voltage devices. BPDs being present in substrates are able to either propagate to the epilayer or convert to harmless threading edge dislocations (TEDs) in the epilayer. The model by Klapper predicts the conversion of BPDs to TEDs to be more efficient for growth on vicinal substrates with low off-cut angle. This paper aims to verify the model by Klapper by an extensive variation of epitaxial growth parameters and the substrates off-cut. It is shown that the off-cut angle is the key parameter for growth of BPD-free epilayers. Furthermore, it is shown that the model also describes adequately the behavior of different types of TEDs, i.e., TED II and TE D III dislocations, during epitaxial growth. Therefore, the model by Klapper is verified successfully for 4H-SiC homoepitaxial growth on vicinal substrates

Modelling of effective minority carrier lifetimes in 4H-SiC n-type epilayers: Poster presented at International Conference on Silicon Carbide and Related Materials, ICSCRM 2015, Giardini Naxos, Italy, October, 4th - 9th, 2015

We present an extended model for the simulation of the effective minority carrier lifetime in 4H-SiC epiwafers after optical excitation. This multilayer model uses measured values (doping profile, point defect concentration, capture cross sections for electrons and epilayer thickness) as input parameters. The bulk lifetime and the diffusion constant are calculated from the actual time dependent excess carrier profiles, resulting in more realistic transients having different decay regimes than in other models. This enables a better understanding of optical lifetime measurements

Experimental verification of the model by Klapper for 4H-SiC homoepitaxy on vicinal substrates

4H-SiC homoepitaxial layers free of basal plane dislocations (BPDs) are urgently needed to overcome the so-called bipolar degradation of high-voltage devices. BPDs being present in substrates are able to either propagate to the epilayer or convert to harmless threading edge dislocations (TEDs) in the epilayer. The model by Klapper predicts the conversion of BPDs to TEDs to be more efficient for growth on vicinal substrates with low off-cut angle. This paper aims to verify the model by Klapper by an extensive variation of epitaxial growth parameters and the substrates' off-cut. It is shown that the off-cut angle is the key parameter for growth of BPD-free epilayers. Furthermore, it is shown that the model also describes adequately the behavior of different types of TEDs, i.e., TED II and TED III dislocations, during epitaxial growth. Therefore, the model by Klapper is verified successfully for 4H-SiC homoepitaxial growth on vicinal substrates

Improvement of 4H-SiC material quality: Invited paper presented at the First International Symposium on SiC Spintronics, Vadstena, Sweden, June 15-17, 2015

The Fraunhofer IISB will introduce its activities in Silicon Carbide to the spintronic community with a special focus on its undertakings on material development and characterization. Our activities in materials development started about 10 years ago. We were improving the 4H-SiC homoepitaxial growth process in order to avoid extended defects, e.g. dislocations and stacking faults, in homoepitaxial layers. We were able to avoid device-killing defects like Basal Plane Dislocations in epilayers and explained these experimental results by appropriate models. Within the last years, the improvement of the minority carrier lifetime by reducing the point defect density has come into focus. Therefore, the influence of epigrowth parameters like, e.g. gas mixing and growth temperature, on the point defect density and carrier lifetime are investigated by using Deep Level Transient Spectroscopy (DLTS) and microwave-detected photoconductivity decay (µ-PCD). Our recent developments target on the reduction of the carbon vacancy, which is known as a lifetime-killing defect. The experimental work is completed by implementing models regarding the point defect generation / annihilation as well as the carrier lifetime measurements. Besides the materials development, the Fraunhofer IISB has been manufacturing SiC electronic devices for more than 20 years. We are producing power electronic as well as optoelectronic SiC devices in small series or prototype fabrication. The process line could be used also to fabricate spintronic prototype devices. In our presentation, we will show and discuss ou r recent advances in materials development and characterization as well as introduce the device processing

Influence of epilayer thickness and structural defects on the minority carrier lifetime in 4H-SiC

4H-SiC homoepitaxial layers with different thicknesses from 12.5 µm up to 50 µm were investigated by microwave-detected photoconductivity decay (µ-PCD), deep level transient spectroscopy (DLTS) and defect selective etching (DSE) to shed light on the influence of the epilayer thickness and structural defects on the effective minority carrier lifetime. It is shown that the effective lifetime, resulting directly from the µ-PCD measurement, is significantly influenced by the surface recombination lifetime. Therefore, an adequate correction of the measured data is necessary to determine the bulk lifetime. The bulk lifetime of these epilayers is in the order of several microseconds. Furthermore, areas with high dislocation density are correlated to areas with locally reduced effective lifetime