A Novel Non-Volatile Inverter-based CiM: Continuous Sign Weight Transition and Low Power on-Chip Training

In this work, we report a novel design, one-transistor-one-inverter (1T1I), to satisfy high speed and low power on-chip training requirements. By leveraging doped HfO2 with ferroelectricity, a non-volatile inverter is successfully demonstrated, enabling desired continuous weight transition between negative and positive via the programmable threshold voltage (VTH) of ferroelectric field-effect transistors (FeFETs). Compared with commonly used designs with the similar function, 1T1I uniquely achieves pure on-chip-based weight transition at an optimized working current without relying on assistance from off-chip calculation units for signed-weight comparison, facilitating high-speed training at low power consumption. Further improvements in linearity and training speed can be obtained via a two-transistor-one-inverter (2T1I) design. Overall, focusing on energy and time efficiencies, this work provides a valuable design strategy for future FeFET-based computing-in-memory (CiM)

ADVANCED BACK-END-OF-LINE COMPATIBLE AMORPHOUS INDIUM-GALLIUM-ZINC-OXIDE-BASED TRANSISTORS FOR 3D MONOLITHIC INTEGRATED CIRCUITS

Ph.DDOCTOR OF PHILOSOPHY (FOE

Top-Gate Short Channel Amorphous Indium-Gallium-Zinc-Oxide Thin Film Transistors with Sub-1.2 nm Equivalent Oxide Thickness

10.1109/jeds.2021.3116763IEEE Journal of the Electron Devices Society91125-113

Bipolar resistive switching and synaptic characteristics modulation at sub-μA current level using novel Ni/SiO_x/W cross-point structure

10.1016/j.jallcom.2019.07.050JOURNAL OF ALLOYS AND COMPOUNDS805915-92

Impact of Ti Interfacial Layer on Resistive Switching Characteristics at sub-μA Current Level in SiO_x-Based Flexible Cross-Point RRAM

10.1109/FLEPS.2019.87922591st IEEE International Conference on Flexible and Printable Sensors and Systems (IEEE FLEPS

Ge₀.₉₅Sn₀.₀₅ gate-all-around p-channel metal-oxide-semiconductor field-effect transistors with sub-3 nm nanowire width

We demonstrate Ge0.95Sn0.05 p-channel gate-all-around field-effect transistors (p-GAAFETs) with sub-3 nm nanowire width (WNW) on a GeSn-on-insulator (GeSnOI) substrate using a top-down fabrication process. Thanks to the excellent gate control by employing an aggressively scaled nanowire structure, Ge0.95Sn0.05 p-GAAFETs exhibit a small subthreshold swing (SS) of 66 mV/decade, a decent on-current/off-current (ION/IOFF) ratio of ∼1.2 × 106, and a high-field effective hole mobility (μeff) of ∼115 cm2/(V s). In addition, we also investigate quantum confinement effects in extremely scaled GeSn nanowires, including threshold voltage (VTH) shift and IOFF reduction with continuous scaling of WNW under 10 nm. The phenomena observed from experimental results are substantiated by the calculation of GeSn bandgap and TCAD simulation of electrical characteristics of devices with sub-10 nm WNW. This study suggests Ge-based nanowire p-FETs with extremely scaled dimension hold promise to deliver good performance to enable further scaling for future technology nodes.National Research Foundation (NRF)This work at NUS was supported by Singapore Ministry of Education (MOE) Tier 2 (MOE2018-T2-2-154) and MOE Tier 1 (R-263-000-D65-114). Prof. Fan Weijun acknowledges the support from the National Research Foundation Singapore (NRF-CRP19-2017-01)

Low Subthreshold Swing and High Mobility Amorphous Indium–Gallium–Zinc-Oxide Thin-Film Transistor With Thin HfO2 Gate Dielectric and Excellent Uniformity

10.1109/LED.2020.2985787IEEE Electron Device Letters416856-85

A van der Waals Synaptic Transistor Based on Ferroelectric Hf 0.5

10.1002/aelm.202000057Advanced Electronic Materials6

A van der Waals Synaptic Transistor Based on Ferroelectric Hf0.5Zr0.5O2 and 2D Tungsten Disulfide

10.1002/aelm.202000057Advanced Electronic Materials6