8,647 research outputs found
An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip
Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as energy-efficient. To find an energy-efficient solution for the communication network we analyze three wireless applications. Based on their communication requirements we observe that revisiting of the circuit switching techniques is beneficial. In this paper we propose a new energy-efficient reconfigurable circuit-switched Network-on-Chip. By physically separating the concurrent data streams we reduce the overall energy consumption. The circuit-switched router has been synthesized and analyzed for its power consumption in 0.13 ¿m technology. A 5-port circuit-switched router has an area of 0.05 mm2 and runs at 1075 MHz. The proposed architecture consumes 3.5 times less energy compared to its packet-switched equivalen
Transmit Signal and Bandwidth Optimization in Multiple-Antenna Relay Channels
Transmit signal and bandwidth optimization is considered in multiple-antenna
relay channels. Assuming all terminals have channel state information, the
cut-set capacity upper bound and decode-and-forward rate under full-duplex
relaying are evaluated by formulating them as convex optimization problems. For
half-duplex relays, bandwidth allocation and transmit signals are optimized
jointly. Moreover, achievable rates based on the compress-and-forward
transmission strategy are presented using rate-distortion and Wyner-Ziv
compression schemes. It is observed that when the relay is close to the source,
decode-and-forward is almost optimal, whereas compress-and-forward achieves
good performance when the relay is close to the destination.Comment: 16 pages, 10 figure
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