Generative Sensing: Transforming Unreliable Sensor Data for Reliable Recognition

This paper introduces a deep learning enabled generative sensing framework which integrates low-end sensors with computational intelligence to attain a high recognition accuracy on par with that attained with high-end sensors. The proposed generative sensing framework aims at transforming low-end, low-quality sensor data into higher quality sensor data in terms of achieved classification accuracy. The low-end data can be transformed into higher quality data of the same modality or into data of another modality. Different from existing methods for image generation, the proposed framework is based on discriminative models and targets to maximize the recognition accuracy rather than a similarity measure. This is achieved through the introduction of selective feature regeneration in a deep neural network (DNN). The proposed generative sensing will essentially transform low-quality sensor data into high-quality information for robust perception. Results are presented to illustrate the performance of the proposed framework.Comment: 5 pages, Submitted to IEEE MIPR 201

A CMOS-compatible high aspect ratio silicon-on-glass in-plane micro-accelerometer

This paper presents a post-CMOS-compatible micro-machined silicon-on-glass (SOG) in-plane capacitive accelerometer. The accelerometer is a high aspect ratio structure with a 120 µm thick single-crystal silicon proof-mass and 3.4 µm sense gap, bonded to a glass substrate. It is fabricated using a simple 3-mask, 5-step process, and is fully CMOS compatible. A CMOS switched-capacitor readout circuit and an oversampled Σ–delta modulator are used to read out capacitance changes from the accelerometer. The CMOS chip is 2.6 × 2.4 mm2 in size, utilizes chopper stabilization and correlated double sampling techniques, has a 106 dB open-loop dynamic range, a low input offset of 370 µV, and can resolve better than 20 aF. The accelerometer system has a measured sensitivity of 40 mV g−1 and input referred noise density of 79 µg Hz−1/2. Using the SOG configuration, a post-CMOS monolithic integration technique is developed. The integration technique utilizes dielectric bridges, silicon islands and the SOG configuration to obtain a simple, robust and post-CMOS-compatible process. Utilizing this technique, an integrated SOG accelerometer has been fabricated using the University of Michigan 3 µm CMOS process.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/49037/2/jmm5_2_013.pd

Wireless Performance of a Fully Passive Neurorecording Microsystem Embedded in Dispersive Human Head Phantom

This paper reports the wireless performance of a biocompatible fully passive microsystem implanted in phantom media simulating the dispersive dielectric properties of the human head, for potential application in recording cortical neuropotentials. Fully passive wireless operation is achieved by means of backscattering electromagnetic (EM) waves carrying 3rd order harmonic mixing products (2f(sub 0) plus or minus f(sub m)=4.4-4.9 GHZ) containing targeted neuropotential signals (fm approximately equal to 1-1000 Hz). The microsystem is enclosed in 4 micrometer thick parylene-C for biocompatibility and has a footprint of 4 millimeters x 12 millimeters x 500 micrometers. Preliminary testing of the microsystem implanted in the lossy biological simulating media results in signal-to-noise ratio's (SNR) near 22 (SNR approximately equal to 38 in free space) for millivolt level neuropotentials, demonstrating the potential for fully passive wireless microsystems in implantable medical applications

Regularization of chaos by noise in electrically driven nanowire systems

The electrically driven nanowire systems are of great importance to nanoscience and engineering. Due to strong nonlinearity, chaos can arise, but in many applications it is desirable to suppress chaos. The intrinsically high-dimensional nature of the system prevents application of the conventional method of controlling chaos. Remarkably, we find that the phenomenon of coherence resonance, which has been well documented but for low-dimensional chaotic systems, can occur in the nanowire system that mathematically is described by two coupled nonlinear partial differential equations, subject to periodic driving and noise. Especially, we find that, when the nanowire is in either the weakly chaotic or the extensively chaotic regime, an optimal level of noise can significantly enhance the regularity of the oscillations. This result is robust because it holds regardless of whether noise is white or colored, and of whether the stochastic drivings in the two independent directions transverse to the nanowire are correlated or independent of each other. Noise can thus regularize chaotic oscillations through the mechanism of coherence resonance in the nanowire system. More generally, we posit that noise can provide a practical way to harness chaos in nanoscale systems.open

A High-Efficiency DC-DC Boost Converter for a Miniaturized Microbial Fuel Cell

Abstract-This paper presents a high-efficiency dc-dc boost converter to interface a miniaturized 50 μL microbial fuel cell (MFC) having 1 cm 2 vertically aligned carbon nanotube anode and 1 cm 2 Cr/Au cathode. Geobacteraceae-enriched mixed bacterial culture in growth medium and 100 mM buffered ferricyanide solutions are used as the anolyte and catholyte, respectively. The miniaturized MFC produces up to approximately 10 μW with an output voltage of 0.4-0.7 V. Such low voltage, which is also load dependent, prevents the MFC to directly drive low power electronics. A pulse-frequency modulation type dc-dc converter in discontinuous conduction mode is designed and implemented to address the challenges and provides a load independent output voltage with high conversion efficiency. The fabricated dc-dc converter in UMC 0.18 μm has been tested with the MFC. At 0.9 V output, the converter has a peak efficiency of 85% with 9 μW load

Robust hermetic packaging techniques for MEMS integrated microsystems.

This work is the result of a Sandia National Laboratories LDRD funded fellowship at the University of Michigan. Although, guidance and suggestions were offered by Sandia, the work contained here is primarily the work of Brian H. Stark, and his advisor, Professor Khalil Najafi. Junseok Chae, Andrew Kuo, and their coworkers at the University of Michigan helped to record some of the data. The following is an abstract of their work. We have developed a vacuum packaging technology using a thick nickel film to seal MEMS structures at the wafer level. The package is fabricated in a three-mask process by electroplating a 40 micro-meter thick nickel film over an 8 micro-meter sacrificial photoresist that is removed prior to package sealing. Implementation of electrical feedthroughs in this process requires no planarization. The large release channel enables an 800x800 micro-meter package to be released in less than three hours. Several mechanisms, based upon localized melting and lead/tin solder bumping, for sealing the release channel have been investigated. We have also developed Pirani gauges, integrated with this package, which can be used to establish the hermeticity of the different sealing technologies. They have measured a sealing pressure of approximately 1.5 Torr. Our work differs from previous Pirani gauges in that we utilize a novel doubly anchored structure that stiffens the structural membrane while not substantially degrading performance in order to measure fine leak rates

High-sensitivity, low -noise, multiaxis capacitive microaccelerometers.

High performance, micro-g resolution, small size, low cost, low power accelerometers are needed in many applications such as inertial navigation, Unmanned Aerial Vehicles (UAVs), and GPS augmentation. Many low-medium performance accelerometers have been commercialized for automotive applications. Several sensing methods have been used, including piezoresistive, piezoelectric, resonant beam, tunneling, and capacitive techniques. Capacitive sensing has several advantages in terms of high sensitivity, stable DC-characteristics, low power dissipation, low temperature sensitivity, and low noise floor. This research work demonstrates full functionality of high-sensitivity, low-noise capacitive multi-axis accelerometers. In order to achieve micro-g resolution, two different structures have been utilized: a Silicon-On-Glass (SOG) accelerometer, and an all-silicon accelerometer. A monolithic fabrication technique for Post-CMOS MEMS is also developed. Finally, a 3-axis single-chip accelerometer is presented. The SOG configuration is implemented with a high aspect-ratio structure (120mum-thick single crystal silicon and bonded to a glass substrate), formed using Deep RIE. It has a 3.4mum sensing gap and a simple 3-mask, 5-step process. A hybrid microsystem consisting of the SOG accelerometer and Sigma-Delta switched-capacitor readout circuit provides 0.15pF/g sensitivity and 80mug/√Hz noise floor. A monolithic circuit-MEMS fabrication technology utilizing a dielectric bridge, silicon islands, and the SOG configuration has been developed. This technique is simple, robust, and fully Post-CMOS compatible. A glass substrate supports the silicon islands and signal routing is provided with the help of a dielectric bridge between the silicon islands. An all-silicon in-plane accelerometer has been implemented using a combined surface and bulk micromachining technology. By taking advantage of the technology, a full-wafer thick proof-mass, large sensing area, and small sensing gap are obtained. The accelerometer combined with the readout circuit provides 5.6pF/g sensitivity and 1.6mug/√Hz noise floor, which is the best reported performance for in-plane micromachined silicon accelerometers. Finally, two in plane and one out-of-plane accelerometers are integrated on a single substrate. The accelerometer system is small in size, self-aligned, and easy to package. All three devices have >3pF/g sensitivity and sub-mug/√Hz mechanical noise floor. The 3-axis accelerometer with the readout circuit provides noise floor of 1.6mug/√Hz and 1.1mug/√Hz for in-plane and out-of-plane devices, respectively.Ph.D.Applied SciencesElectrical engineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/123361/2/3079423.pd

Miniaturized protein separation using a liquid chromatography column on a flexible substrate

Abstract We report a prototype protein separator that successfully miniaturizes existing technology for potential use in biocompatible health monitoring implants. The prototype is a liquid chromatography (LC) column (LC mini-column) fabricated on an inexpensive, flexible, biocompatible polydimethylsiloxane (PDMS) enclosure. The LC mini-column separates a mixture of proteins using size exclusion chromatography (SEC) with polydivinylbenzene beads (5-20 μm in diameter with 10 nm pore size). The LC mini-column is smaller than any commercially available LC column by a factor of ∼11 000 and successfully separates denatured and native protein mixtures at ∼71 psi of the applied fluidic pressure. Separated proteins are analyzed using NuPAGE-gel electrophoresis, high-performance liquid chromatography (HPLC) and an automated electrophoresis system. Quantitative HPLC results demonstrate successful separation based on intensity change: within 12 min, the intensity between large and small protein peaks changed by a factor of ∼20. In further evaluation using the automated electrophoresis system, the plate height of the LC mini-column is between 36 μm and 100 μm. The prototype LC mini-column shows the potential for real-time health monitoring in applications that require inexpensive, flexible implant technology that can function effectively under non-laboratory conditions