51 research outputs found
Dlx5 specifically regulates Runx2 type II expression by binding to homeodomain-response elements in the Runx2 distal promoter
Two major isoforms of the Runx2 gene are expressed by alternative
promoter usage: Runx2 type I (Runx2-I) is derived from the
proximal promoter (P2), and Runx2 type II (Runx2-II) is produced
by the distal promoter (P1). Our previous results indicate that Dlx5
mediates BMP-2-induced Runx2 expression and osteoblast differentiation
(Lee, M.-H., Kim, Y-J., Kim, H-J., Park, H-D., Kang, A-R.,
Kyung, H.-M., Sung, J-H., Wozney, J. M., Kim, H-J., and Ryoo, H-M.
(2003) J. Biol. Chem. 278, 34387–34394). However, little is known of
the molecular mechanisms by which Dlx5 up-regulates Runx2
expression in BMP-2 signaling. Here, Runx2-II expression was
found to be specifically stimulated by BMP-2 treatment or by Dlx5
overexpression. In addition, BMP-2, Dlx5, and Runx2-II were found
to be expressed in osteogenic fronts and parietal bones of the developing
cranial vault and Runx2-I and Msx2 in the sutural mesenchyme.
Furthermore, Runx2 P1 promoter activity was strongly
stimulated by Dlx5 overexpression, whereas Runx2 P2 promoter
activity was not. Runx2 P1 promoter deletion analysis indicated that
the Dlx5-specific response is due to sequences between 756 and
342 bp of the P1 promoter, where three Dlx5-response elements
are located. Dlx5 responsiveness to these elements was confirmed
by gel mobility shift assay and site-directed mutagenesis. Moreover,
Msx2 specifically suppressed the Runx2 P1 promoter, and the
responsible region overlaps with that recognized by Dlx5. In summary,
Dlx5 specifically transactivates the Runx2 P1 promoter, and
its action on the P1 promoter is antagonized by Msx2.This work was supported by Grants 01-PJ1-PG1-01CH08-0001 and 01-PJ3-PG6-
01GN11-0002 from the Korea Health 21 R&D Project, Ministry of Health and Welfare,
Republic of Korea. The costs of publication of this article were defrayed in part by the
payment of page charges. This article must therefore be hereby marked advertisement
in accordance with 18 U.S.C. Section 1734 solely to indicate this fact
Dissemination of multidrug-resistant tuberculosis in a patient with acute HIV infection
심방실중격결손증 (心房室中隔缺損症) - 병리학적 관찰 및 병리표본이중조경
With five specimens of AVSD's from autopsy file of the Seoul National University
Hospital, the following items were analysed; 1. external appearance of the heart, 2. atrial
and ventricular aspects of the septal defects, 3. inlet septum of the left ventricle, 4. left
ventricular outflow tract, 5. aortic valve, 6. atrioventricular valve annulus.
After complete analysis, double contrast specimen radiography was performed. Common
pathologic features of the AVSD's were globar external appearance, large septal defect at the
atrioventricular junction, short posterior inlet septum or diaphragmatic wall of the left ventricle,
elongation and narrowing of the left ventricular outflow tract, anterior and rightward displacement
of the aortic valve and malorientation of the atrioventricular valve annulus
Phase II trial of continuous dosing of regorafenib in patients with metastatic or recurrent gastrointestinal stromal tumors (GISTs) after failure of imatinib and sunitinib.
Change of Renal Parenchymal Width in Patients with Unilateral Ureteral Stent: A Bicenter Retrospective Study
Purpose. To determine whether kidney sizes were changed after ureteral stents were instilled, and if so, what parameters were significant. Methods. Parenchymal width (PW) of 98 patients with unilateral ureteral stents was measured from the coronal view of CT scans for both stented and unstented contralateral kidney. The mean PW and % change of mean PW were calculated before stenting and at the time of last stent change. Estimated glomerular filtrate rate (eGFR) was recorded as well. Results. The mean duration of ureteral stent indwelled was 15.6±10.2 (mean ± SD) months. The change of mean PW of stented kidneys and unstented contralateral kidneys was −16.9±16.4 (mean ± SD)% and 3.6±10.7%, respectively. eGFR before and at the time of the last stent change did not show significant difference (p=0.294). Duration of ureteral stent indwelled was found to be inversely related to the % change of mean PW (Spearman’s correlation coefficient = −0.291, p<0.001). Conclusions. For unilateral ureteral obstruction, kidney size was decreased over time in spite of indwelling ureteral stent. This finding can be overlooked by clinicians due to compensatory growth of contralateral kidney and resultant normal eGFR
Retroperitoneal Laparoscopic Radical Nephrectomy for Large (>7 cm) Solid Renal Tumors: Comparison of Perioperative Outcomes with the Transperitoneal Approach
Low Phase-Noise, 2.4 and 5.8 GHz Dual-Band Frequency Synthesizer with Class-C VCO and Bias-Controlled Charge Pump for RF Wireless Charging System in 180 nm CMOS Process
This paper presents an integer-N phase-locked loop (PLL) for an RF wireless charging system. To improve the phase-noise characteristics under low power, a constant amplitude control class-C voltage-controlled oscillator (VCO) with a DC-DC converter, and a bias-controlled charge pump with a feedback loop are proposed. The frequency range of the VCO is 4.5–6.1 GHz, the target frequency of the proposed PLL is 2.4 and 5.8 GHz in the industry–science–medical band. It is designed with a same phase margin and bandwidth using one loop filter. The proposed PLL consumes less than 8 mW from a 1.8 V power supply with a settling time of fewer than 20 μs and an area of 1200 μm × 800 μm in the 180 nm CMOS process. For a carrier frequency offset of 1 MHz, the measured phase noise is −118.5 dBc/Hz at 2.4 GHz and −116.6 dBc/Hz at 5.8 GHz. Its FoM including the phase noise is −197 dB at 2.4 GHz and −202.8 GHz at 5.8 GHz, outperforming other PLLs designed in the 180 nm CMOS process
Low Phase-Noise, 2.4 and 5.8 GHz Dual-Band Frequency Synthesizer with Class-C VCO and Bias-Controlled Charge Pump for RF Wireless Charging System in 180 nm CMOS Process
This paper presents an integer-N phase-locked loop (PLL) for an RF wireless charging system. To improve the phase-noise characteristics under low power, a constant amplitude control class-C voltage-controlled oscillator (VCO) with a DC-DC converter, and a bias-controlled charge pump with a feedback loop are proposed. The frequency range of the VCO is 4.5–6.1 GHz, the target frequency of the proposed PLL is 2.4 and 5.8 GHz in the industry–science–medical band. It is designed with a same phase margin and bandwidth using one loop filter. The proposed PLL consumes less than 8 mW from a 1.8 V power supply with a settling time of fewer than 20 μs and an area of 1200 μm × 800 μm in the 180 nm CMOS process. For a carrier frequency offset of 1 MHz, the measured phase noise is −118.5 dBc/Hz at 2.4 GHz and −116.6 dBc/Hz at 5.8 GHz. Its FoM including the phase noise is −197 dB at 2.4 GHz and −202.8 GHz at 5.8 GHz, outperforming other PLLs designed in the 180 nm CMOS process
A Highly Efficient RF-DC Converter for Energy Harvesting Applications Using a Threshold Voltage Cancellation Scheme
In this paper, a self-threshold voltage (Vth) compensated Radio Frequency to Direct Current (RF-DC) converter operating at 900 MHz and 2.4 GHz is proposed for RF energy harvesting applications. The threshold voltage of the rectifying devices is compensated by the bias voltage generated by the auxiliary transistors and output DC voltage. The auxiliary transistors compensate the threshold voltage (Vth) of the PMOS rectifying device while the threshold voltage (Vth) of the NMOS rectifying device is compensated by the output DC voltage. The proposed RF-DC converter was implemented in 180 nm Complementary Metal-Oxide Semiconductor (CMOS) technology. The experimental results show that the proposed design achieves better performance at both 900 MHz and 2.4 GHz frequencies in terms of PCE, output voltage, sensitivity, and effective area. The peak power conversion efficiency (PCE) of 38.5% at −12 dBm across a 1 MΩ load for 900 MHz frequency was achieved. Similarly, for 2.4 GHz frequency, the proposed circuit achieves a peak PCE of 26.5% at −6 dBm across a 1 MΩ load. The proposed RF-DC converter circuit shows a sensitivity of −20 dBm across a 1 MΩ load and produces a 1 V output DC voltage
- …