Synthesis of Two Dimensional Materials, Black Phosphorus and Graphene: Characerization of Their Electrical and Mechanical Properties and Applications

Since 2004, the first exfoliation of graphene, many researchers have been interested in two-dimensional (2D) materials because of their intriguing electrical and optical properties and extremely low thickness. Black phosphorus, which is a new member of 2D materials, has shown unique properties compared with graphene. It has a tunable, thickness-dependent bandgap from 0.3 eV (bulk) to 2.0 eV (monolayer), and electrical mobility of 1,000 cm2/V∙s. It also shows intrinsic anisotropy characteristics for thermal and electrical conductivity and mechanical strength. The first black phosphorus was synthesized in 1914 by using a high-pressure technique (several GPa) with white phosphorus. The mineralizer-assisted method was reported in 2007 and optimized in 2014 without high pressure and toxic materials. However, the grown black phosphorus is a bulk form so we need a further step to prepare thin black phosphorus flakes and the growth mechanism is not clear. In Chapter 1, we direct the growth of black phosphorus on substrates placed in an evacuated ampoule. We used a variety of substrates, including quartz, epitaxially grown graphene on SiC, and metal-coated SiO2/Si. We also proposed that the growth mechanism of black phosphorus depends on the experimental conditions. In Chapter 2, two-terminal memory devices were fabricated by spray coating liquid-exfoliated black phosphorus ink to form the active device layer on a heavily doped Si substrate (bottom electrode), followed by spray coating of a liquid-exfoliated graphene layer through a stencil mask (top electrode). Memory devices fabricated with black phosphorus inks prepared by 3,000 rpm maximum centrifugation for separating the thin exfoliated flakes show volatile resistive memory device characteristics, specifically static random access memory (SRAM), and bipolar resistive switching characteristics. It shows a high on/off current ratio and good retention stability over 104 s. The device also showed multilevel data storage performance under different compliance currents, from 10-2 to 10-5 A. Importantly, a non-volatile memory device was also fabricated, using ink that comprised thinner, on average, black phosphorus flakes with a narrower thickness distribution than the ink used in the above-described devices. Such ink was prepared by a 10,000 rpm maximum centrifugation step for separating the thin exfoliated flakes. The non-volatile memory device showed good write/erase operation during 100 endurance cycles, like flash memory, and an on/off current ratio of around 1.9 x 103 at 0.5 V. In Chapter 3, we synthesized graphene by using the chemical vapor deposition (CVD) technique on copper foil. We also fabricated interlayer bonded graphene bi- and multi-layers by using hydrogen plasma and annealing under argon conditions at 400 °C. The prepared graphene was transferred on a TEM grid with a Formvar supporting layer to prepare the suspended graphene film. We used AFM to measure the mechanical and tribology characteristics of such graphene. As a result, the calculated Young’s modulus was 1.003 ± 0.179, 0.918 ± 0.097, and 0.827 ± 0.124 TPa for single-, bi-, and interlayer bonded bi-layer graphene. The interlayer bonded bi-layer graphene shows a smaller deviation from the linear elastic model than single- and bi-layer graphene because interlayer bonding prevents the slippage between the layers during the indentation test. We calculated interfacial shear strength and contact radius at zero loads by using the Derjaguin-Müller-Toporov (DMT) contact model. The interlayer bonded bi-layer graphene shows a higher interfacial shear strength and contact radius than pristine bi-layer graphene. Lastly, we calculated the shear modulus and it was 10.33, 6.58, and 13.44 GPa for single-, bi-layer, and interlayer bonded bi-layer graphene. The interlayer bonded bi-layer graphene shows a higher shear modulus than pristine bi-layer graphene as expected from computer simulation/modeling papers

Large Memory Window of van der Waals Heterostructure Devices Based on MOCVD-Grown 2D Layered Ge4Se9

Van der Waals (vdW) heterostructures have drawn much interest over the last decade owing to their absence of dangling bonds and their intriguing low-dimensional properties. The emergence of 2D materials has enabled the achievement of significant progress in both the discovery of physical phenomena and the realization of superior devices. In this work, the group IV metal chalcogenide 2D-layered Ge4Se9 is introduced as a new selection of insulating vdW material. 2D-layered Ge4Se9 is synthesized with a rectangular shape using the metalcorganic chemical vapor deposition system using a liquid germanium precursor at 240 degrees C. By stacking the Ge4Se9 and MoS2, vdW heterostructure devices are fabricated with a giant memory window of 129 V by sweeping back gate range of +/- 80 V. The gate-independent decay time reveals that the large hysteresis is induced by the interfacial charge transfer, which originates from the low band offset. Moreover, repeatable conductance changes are observed over the 2250 pulses with low non-linearity values of 0.26 and 0.95 for potentiation and depression curves, respectively. The energy consumption of the MoS2/Ge4Se9 device is about 15 fJ for operating energy and the learning accuracy of image classification reaches 88.3%, which further proves the great potential of artificial synapses