Stochastic Modeling of Hybrid Cache Systems

In recent years, there is an increasing demand of big memory systems so to perform large scale data analytics. Since DRAM memories are expensive, some researchers are suggesting to use other memory systems such as non-volatile memory (NVM) technology to build large-memory computing systems. However, whether the NVM technology can be a viable alternative (either economically and technically) to DRAM remains an open question. To answer this question, it is important to consider how to design a memory system from a "system perspective", that is, incorporating different performance characteristics and price ratios from hybrid memory devices. This paper presents an analytical model of a "hybrid page cache system" so to understand the diverse design space and performance impact of a hybrid cache system. We consider (1) various architectural choices, (2) design strategies, and (3) configuration of different memory devices. Using this model, we provide guidelines on how to design hybrid page cache to reach a good trade-off between high system throughput (in I/O per sec or IOPS) and fast cache reactivity which is defined by the time to fill the cache. We also show how one can configure the DRAM capacity and NVM capacity under a fixed budget. We pick PCM as an example for NVM and conduct numerical analysis. Our analysis indicates that incorporating PCM in a page cache system significantly improves the system performance, and it also shows larger benefit to allocate more PCM in page cache in some cases. Besides, for the common setting of performance-price ratio of PCM, "flat architecture" offers as a better choice, but "layered architecture" outperforms if PCM write performance can be significantly improved in the future.Comment: 14 pages; mascots 201

Rational design and directed evolution of a bacterial-type glutaminyl-tRNA synthetase precursor.

To access publisher full text version of this article. Please click on the hyperlink in Additional Links field.Protein biosynthesis requires aminoacyl-transfer RNA (tRNA) synthetases to provide aminoacyl-tRNA substrates for the ribosome. Most bacteria and all archaea lack a glutaminyl-tRNA synthetase (GlnRS); instead, Gln-tRNA(Gln) is produced via an indirect pathway: a glutamyl-tRNA synthetase (GluRS) first attaches glutamate (Glu) to tRNA(Gln), and an amidotransferase converts Glu-tRNA(Gln) to Gln-tRNA(Gln). The human pathogen Helicobacter pylori encodes two GluRS enzymes, with GluRS2 specifically aminoacylating Glu onto tRNA(Gln). It was proposed that GluRS2 is evolving into a bacterial-type GlnRS. Herein, we have combined rational design and directed evolution approaches to test this hypothesis. We show that, in contrast to wild-type (WT) GlnRS2, an engineered enzyme variant (M110) with seven amino acid changes is able to rescue growth of the temperature-sensitive Escherichia coli glnS strain UT172 at its non-permissive temperature. In vitro kinetic analyses reveal that WT GluRS2 selectively acylates Glu over Gln, whereas M110 acylates Gln 4-fold more efficiently than Glu. In addition, M110 hydrolyzes adenosine triphosphate 2.5-fold faster in the presence of Glu than Gln, suggesting that an editing activity has evolved in this variant to discriminate against Glu. These data imply that GluRS2 is a few steps away from evolving into a GlnRS and provides a paradigm for studying aminoacyl-tRNA synthetase evolution using directed engineering approaches.National Institute of General Medical Sciences GM02285

Cryptanalysis of a Type of White-Box Implementations of the SM4 Block Cipher

The SM4 block cipher was first released in 2006 as SMS4 used in the Chinese national standard WAPI, and became a Chinese national standard in 2016 and an ISO international standard in 2021. White-box cryptography aims primarily to protect the secret key used in a cryptographic software implementation in the white-box scenario that assumes an attacker to have full access to the execution environment and execution details of an implementation. Since white-box cryptography has many real-life applications nowadays, a few white-box implementations of the SM4 block cipher has been proposed with its increasingly wide use, among which a type of constructions is dominated, that use an affine diagonal block encoding to protect the original XOR sum of the three branches entering the S-box layer of a round and use its inverse to protect the original input of the S-box layer, such as Xiao and Lai\u27s implementation in 2009, Shang\u27s implementation in 2016 and Yao and Chen\u27s implementation in 2020. In this paper, we show that this type of white-box SM4 constructions can be somewhat equivalent to a plain implementation mostly with Boolean masks from a security viewpoint, by devising collision-based attacks on Xiao and Lai\u27s, Shang\u27s and Yao and Chen\u27s implementations with a time complexity of respectively about $2^{22}$, $2^{39}$ and $2^{22}$ to peel off most white-box operations until only Boolean masks remain. Besides, we present a collision-based attack on a white-box SM4 implementation with a time complexity of about $2^{17.1}$ to recover an original round key, which uses a linear diagonal block encoding instead of an affine diagonal block encoding. Our results show that generating such a white-box SM4 implementation with affine encodings can be simplified into generating a plain implementation with Boolean masks (if its security expectation is beyond the above-mentioned complexity), and the effect of an affine encoding is significantly better than the effect of a linear encoding in the sense of our cryptanalysis results

How Hard is Takeover in DPoS Blockchains? Understanding the Security of Coin-based Voting Governance

Delegated-Proof-of-Stake (DPoS) blockchains, such as EOSIO, Steem and TRON, are governed by a committee of block producers elected via a coin-based voting system. We recently witnessed the first de facto blockchain takeover that happened between Steem and TRON. Within one hour of this incident, TRON founder took over the entire Steem committee, forcing the original Steem community to leave the blockchain that they maintained for years. This is a historical event in the evolution of blockchains and Web 3.0. Despite its significant disruptive impact, little is known about how vulnerable DPoS blockchains are in general to takeovers and the ways in which we can improve their resistance to takeovers. In this paper, we demonstrate that the resistance of a DPoS blockchain to takeovers is governed by both the theoretical design and the actual use of its underlying coin-based voting governance system. When voters actively cooperate to resist potential takeovers, our theoretical analysis reveals that the current active resistance of DPoS blockchains is far below the theoretical upper bound. However in practice, voter preferences could be significantly different. This paper presents the first large-scale empirical study of the passive takeover resistance of EOSIO, Steem and TRON. Our study identifies the diversity in voter preferences and characterizes the impact of this diversity on takeover resistance. Through both theoretical and empirical analyses, our study provides novel insights into the security of coin-based voting governance and suggests potential ways to improve the takeover resistance of any blockchain that implements this governance model.Comment: This work has been accepted by ACM CCS 202