15 research outputs found

    A data-driven statistical approach to analyzing process variation

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    This paper presents a simple yet effective method to analyze process variations using statistics on manufacturing in-line data without assuming any explicit underlying model for process variations. Our method is based on a variant of principal component analysis and is able to reveal systematic variation patterns existing on a die-to-die and wafer-to-wafer level individually. The separation of die variation from wafer variation can enhance the understanding of a nature of the process uncertainty. Our case study based on the proposed decomposition method shows that the dominating die-todie variation and wafer-to-wafer variation represent 31% and 25 % of the total variance of a large set of in-line parameters in 65nm SOI CMOS technology. 1

    A 1.2V 15.6mW 81GHz 2:1 static CML frequency divider with a band-pass load in a 90nm SOI CMOS technology

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    A 2:1 static frequency divider using a band-pass load was fabricated in a digital 90nm SOI CMOS technology. The divider exhibits a maximum operating frequency of 81GHz at 1.2V, and a core power of 15.6mW. The divider can operate down to 0.5V at a maximum operating frequency of 75.6GHz with a core power of 2.75mW

    A low-voltage multi-GHz VCO with 58% tuning range in SOI CMOS

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    A low-voltage 3.0-5.6 GHz VCO was designed and fabricated in an 0.13 μm SOI CMOS process. This VCO features a single-loop horseshoe-shaped inductor and an array of band-switching accumulation MOS (AMOS) varactors. This results in good phase noise and wide tuning range of 58.7% when tuned between 0 to 1.4 V. At a I V supply (VDD) and 1 MHz offset, the phase noise is -120 dBc/Hz at 3.0 GHz, and -114.5 dBc/Hz at 5.6 GHz. The power dissipation is between 2 and 3 mW across the whole tuning range. The buffered output power is -7 dBm. When VDD is reduced to 0.83 V, the VCO dissipates less than 1 mW at 5.6 GHz

    A 1V 3.8-5.7 GHz differentially-tuned VCO in SOI CMOS

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    A 1 V 3.8-5.7 GHz VCO was designed and fabricated in a 0.13 μm SOI CMOS process. This VCO features differentially-tuned accumulation MOS varactors that (a) provides 40% frequency tuning when biased between 0 to 1 V, and (b) rejects common-mode noise such as flicker noise. At 1 MHz offset, the phase noise is -121.67 dBc/Hz at 3.8 GHz, and -111.67 dBc/Hz at 5.7 GHz. The power dissipation is between 2.3 to 2.7 mW depending on the centre frequency. When VDD is reduced to 0.75 V, the VCO only dissipates 0.8 mW at 5.5 GHz

    A 40 GHz VCO with 9 to 15% tuning range in 0.13μm SOI CMOS

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    A 40 GHz fully-monolithic complementary VCO fabricated in IBM 0.13 μm partially-depleted SOI CMOS technology is reported. The VCO operates at 1.5 V supply and draws 11.25 mW of power. The measured phase noise at 40 GHz is -109 dBc/Hz at 4 MHz offset from the carrier. At 1.5 V and 2 V VDD, the tuning range is 9% and 15% respectively, and the output power is -8 dBm and -5 dBm respectively. The VCO occupies a chip area of only 100 μm by 100 μm

    A 1-V 3.8-5.7-GHz wide-band VCO with differentially tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology

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    In this paper, a 1-V 3.8-5.7-GHz wide-band voltage-controlled oscillator (VCO) in a 0.13-μm silicon-on-insulator (SOI) CMOS process is presented. This VCO features differentially tuned accumulation MOS varactors that: 1) provide 40% frequency tuning when biased between 0-1 V and 2) diminish the adverse effect of high varactor sensitivity through rejection of common-mode noise. This paper shows that, for differential LC VCOs, all low-frequency noise such as flicker noise can be considered to be common-mode noise, and differentially tuned varactors can be used to suppress common-mode noise from being upconverted to the carrier frequency. The noise rejection mechanism is explained, and the technological advantages of SOI over bulk CMOS in this regard is discussed. At 1-MHz offset, the measured phase noise

    Design of wide-band CMOS VCO for multiband wireless LAN applications

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    In this paper, a general design methodology of low-voltage wide-band voltage-controlled oscillator (VCO) suitable for wireless LAN (WLAN) application is described. The applications of high-quality passives for the resonator are introduced: 1) a single-loop horseshoe inductor with Q > 20 between 2 and 5 GHz [1] for good phase noise performance; and 2) accumulation MOS (AMOS) varactors with Cmax/Cmin ratio of 6 [2] to provide wide-band tuning capability at low-voltage supply. The adverse effect of AMOS varactors due to high sensitivity is examined. Amendment using bandswitching topology is suggested, and a phase noise improvement of 7 dB is measured to prove the concept. The measured VCO operates on a 1-V supply with a wide tuning range of 58.7% between 3.0 and 5.6 GHz when tuned between ±0.7 V. The pha
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