46 research outputs found

    High-fidelity quantum state evolution in imperfect photonic integrated circuits

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    We propose and analyze the design of a programmable photonic integrated circuit for high-fidelity quantum computation and simulation. We demonstrate that the reconfigurability of our design allows us to overcome two major impediments to quantum optics on a chip: it removes the need for a full fabrication cycle for each experiment and allows for compensation of fabrication errors using numerical optimization techniques. Under a pessimistic fabrication model for the silicon-on-insulator process, we demonstrate a dramatic fidelity improvement for the linear optics controlled-not and controlled-phase gates and, showing the scalability of this approach, the iterative phase estimation algorithm built from individually optimized gates. We also propose and simulate an experiment that the programmability of our system would enable: a statistically robust study of the evolution of entangled photons in disordered quantum walks. Overall, our results suggest that existing fabrication processes are sufficient to build a quantum photonic processor capable of high-fidelity operation.United States. Air Force Office of Scientific Research. Multidisciplinary University Research Initiative (Grant FA9550-14-1-0052)iQuISE FellowshipNational Science Foundation (U.S.). Graduate Research Fellowship (Grant 1122374)American Society for Engineering Education. National Defense Science and Engineering Graduate FellowshipAlfred P. Sloan Foundation (Sloan Research Fellowship

    Efficient generation of single and entangled photons on a silicon photonic integrated chip

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    We present a protocol for generating on-demand, indistinguishable single photons on a silicon photonic integrated chip. The source is a time-multiplexed spontaneous parametric down-conversion element that allows optimization of single-photon versus multiphoton emission while realizing high output rate and indistinguishability. We minimize both the scaling of active elements and the scaling of active element loss with multiplexing. We then discuss detection strategies and data processing to further optimize the procedure. We simulate an improvement in single-photon-generation efficiency over previous time-multiplexing protocols, assuming existing fabrication capabilities. We then apply this system to generate heralded Bell states. The generation efficiency of both nonclassical states could be increased substantially with improved fabrication procedures.Comment: 7 pages, 4 figure

    Efficient, Compact and Low Loss Thermo-Optic Phase Shifter in Silicon

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    We design a resistive heater optimized for efficient and low-loss optical phase modulation in a silicon-on-insulator (SOI) waveguide and characterize the fabricated devices. Modulation is achieved by flowing current perpendicular to a new ridge waveguide geometry. The resistance profile is engineered using different dopant concentrations to obtain localized heat generation and maximize the overlap between the optical mode and the high temperature regions, while simultaneously minimizing optical loss due to free-carrier absorption. A 61.6 micrometer-long phase shifter was fabricated in a CMOS process with oxide cladding and two metal layers. The device features a phase-shifting efficiency of 24.77 +/- 0.43 mW/pi and a -3 dB modulation bandwidth of 130.0 +/- 5.59 kHz. The insertion loss measured for 21 devices across an 8-inch wafer was only 0.23 +/- 0.13 dB. Considering the prospect of densely integrated photonic circuits, we also quantify the separation necessary to isolate thermo-optic devices in the standard 220 nm SOI platform.Comment: This paper was published in Optics Express and is made available as an electronic reprint with the permission of OSA. The paper can be found at the following URL on the OSA website: http://dx.doi.org/10.1364/OE.22.010487. Systematic or multiple reproduction or distribution to multiple locations via electronic or other means is prohibited and is subject to penalties under la

    Large-scale quantum photonic circuits in silicon

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    Quantum information science offers inherently more powerful methods for communication, computation, and precision measurement that take advantage of quantum superposition and entanglement. In recent years, theoretical and experimental advances in quantum computing and simulation with photons have spurred great interest in developing large photonic entangled states that challenge today’s classical computers. As experiments have increased in complexity, there has been an increasing need to transition bulk optics experiments to integrated photonics platforms to control more spatial modes with higher fidelity and phase stability. The silicon-on-insulator (SOI) nanophotonics platform offers new possibilities for quantum optics, including the integration of bright, nonclassical light sources, based on the large third-order nonlinearity (χ(3)) of silicon, alongside quantum state manipulation circuits with thousands of optical elements, all on a single phase-stable chip. How large do these photonic systems need to be? Recent theoretical work on Boson Sampling suggests that even the problem of sampling from e30 identical photons, having passed through an interferometer of hundreds of modes, becomes challenging for classical computers. While experiments of this size are still challenging, the SOI platform has the required component density to enable low-loss and programmable interferometers for manipulating hundreds of spatial modes. Here, we discuss the SOI nanophotonics platform for quantum photonic circuits with hundreds-to-thousands of optical elements and the associated challenges. We compare SOI to competing technologies in terms of requirements for quantum optical systems. We review recent results on large-scale quantum state evolution circuits and strategies for realizing high-fidelity heralded gates with imperfect, practical systems. Next, we review recent results on silicon photonics-based photon-pair sources and device architectures, and we discuss a path towards large-scale source integration. Finally, we review monolithic integration strategies for single-photon detectors and their essential role in on-chip feed forward operations.United States. Air Force Office of Scientific Research (FA9550-14-1-0052)United States. Air Force Research Laboratory. RITA Program (FA8750-14-2-0120)American Society for Engineering Education. National Defense Science and Engineering Graduate FellowshipNational Science Foundation (U.S.). Graduate Research Fellowship Program (Grant 1122374)

    Scalable single-photon detection on a photonic chip

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    We developed a scalable method for integrating sub-70-ps-timing-jitter superconducting nanowire single-photon detectors with photonic integrated circuits. We assembled a photonic chip with four integrated detectors and performed the first on-chip g[superscript (2)](Ï„)-measurements of an entangled-photon source
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