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1 research outputs found
Buffered Clock Tree Synthesis with Non-Zero Clock Skew Scheduling for Increased Tolerance to Process Parameter Variations
Author
EG Friedman
EG Friedman
+19Â more
HB Bakoglu
J Cong
J Cong
JL Neves
JL Neves
JL Neves
JL Neves
JL Neves
JP Fishbum
M Shoji
Q Zhu
R-S Tsay
RB Deokar
S Dhar
S Lin
S Pullela
T Sakurai
T-H Chao
TG Szymanski
Publication venue
'Springer Science and Business Media LLC'
Publication date
01/01/1996
Field of study
No full text
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