4 research outputs found

    Fabrication and operation of a two-dimensional ion-trap lattice on a high-voltage microchip

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    Microfabricated ion traps are a major advancement towards scalable quantum computing with trapped ions. The development of more versatile ion-trap designs, in which tailored arrays of ions are positioned in two dimensions above a microfabricated surface, will lead to applications in fields as varied as quantum simulation, metrology and atom–ion interactions. Current surface ion traps often have low trap depths and high heating rates, because of the size of the voltages that can be applied to them, limiting the fidelity of quantum gates. Here we report on a fabrication process that allows for the application of very high voltages to microfabricated devices in general and use this advance to fabricate a two-dimensional ion-trap lattice on a microchip. Our microfabricated architecture allows for reliable trapping of two-dimensional ion lattices, long ion lifetimes, rudimentary shuttling between lattice sites and the ability to deterministically introduce defects into the ion lattice

    Engineering of microfabricated ion traps and integration of advanced on-chip features

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    Atomic ions trapped in electromagnetic potentials have long been used for fundamental studies in quantum physics. Over the past two decades, trapped ions have been successfully used to implement technologies such as quantum computing, quantum simulation, atomic clocks, mass spectrometers and quantum sensors. Advanced fabrication techniques, taken from other established or emerging disciplines, are used to create new, reliable ion-trap devices aimed at large-scale integration and compatibility with commercial fabrication. This Technical Review covers the fundamentals of ion trapping before discussing the design of ion traps for the aforementioned applications. We overview the current microfabrication techniques and the various considerations behind the choice of materials and processes. Finally, we discuss current efforts to include advanced, on-chip features in next-generation ion traps
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