916 research outputs found

    The development of an interim generalized gate logic software simulator

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    A proof-of-concept computer program called IGGLOSS (Interim Generalized Gate Logic Software Simulator) was developed and is discussed. The simulator engine was designed to perform stochastic estimation of self test coverage (fault-detection latency times) of digital computers or systems. A major attribute of the IGGLOSS is its high-speed simulation: 9.5 x 1,000,000 gates/cpu sec for nonfaulted circuits and 4.4 x 1,000,000 gates/cpu sec for faulted circuits on a VAX 11/780 host computer

    Measurement of fault latency in a digital avionic miniprocessor

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    The results of fault injection experiments utilizing a gate-level emulation of the central processor unit of the Bendix BDX-930 digital computer are presented. The failure detection coverage of comparison-monitoring and a typical avionics CPU self-test program was determined. The specific tasks and experiments included: (1) inject randomly selected gate-level and pin-level faults and emulate six software programs using comparison-monitoring to detect the faults; (2) based upon the derived empirical data develop and validate a model of fault latency that will forecast a software program's detecting ability; (3) given a typical avionics self-test program, inject randomly selected faults at both the gate-level and pin-level and determine the proportion of faults detected; (4) determine why faults were undetected; (5) recommend how the emulation can be extended to multiprocessor systems such as SIFT; and (6) determine the proportion of faults detected by a uniprocessor BIT (built-in-test) irrespective of self-test

    Advanced flight control system study

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    The architecture, requirements, and system elements of an ultrareliable, advanced flight control system are described. The basic criteria are functional reliability of 10 to the minus 10 power/hour of flight and only 6 month scheduled maintenance. A distributed system architecture is described, including a multiplexed communication system, reliable bus controller, the use of skewed sensor arrays, and actuator interfaces. Test bed and flight evaluation program are proposed

    The Dynamic Behavior of Efficient Timber Prices

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    The problem of when to optimally harvest trees when timber prices evolve according to an exogenous stochastic process has been studied extensively in recent decades. However, little attention has been given to the appropriate form of the stochastic process for timber prices, despite the fact that the choice of a process has important effects on optimal harvesting decisions. We develop a simple theoretical model of a timber market and show that there exists a rational expectations equilibrium in which prices evolve according to a stationary ARMA(1,1) process. Simulations are used to analyze a model with a more general representation of timber stock dynamics and to demonstrate that the unconditional distribution for rational timber prices is asymmetric. Implications for the optimal harvesting literature are: 1) market efficiency provides little justification for random walk prices, 2) unit root tests, used to analyze the informational efficiency of timber markets, do not distinguish between efficient and inefficient markets, and 3) failure to recognize asymmetric disturbances in time-series analyses of historical timber prices can lead to sub-optimal harvesting rules.

    Grave of the Forest

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    Feasibility study for a generalized gate logic software simulator

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    Unit-delay simulation, event driven simulation, zero-delay simulation, simulation techniques, 2-valued versus multivalued logic, network initialization, gate operations and alternate network representations, parallel versus serial mode simulation fault modelling, extension of multiprocessor systems, and simulation timing are discussed. Functional level networks, gate equivalent circuits, the prototype BDX-930 network model, fault models, identifying detected faults for BGLOSS are discussed. Preprocessor tasks, postprocessor tasks, executive tasks, and a library of bliss coded macros for GGLOSS are also discussed

    Grid workflow scheduling in WOSE

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