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    CMOS Tunable Pseudo-Resistor with Low Harmonic Distortion

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    In this work, a tunable pseudo-resistor was designed, simulated, and tested using a 0.35 µm CMOS technology. The proposal used a compact voltage bias circuit free of body-effect, allowing a constant resistance value over the pseudo-resistor’s dynamic range, improving its linearity. A fabricated cell was characterized providing a resistance value from 300 kΩ to 10 GΩ with a THD from p. The simulations were compared with experimental measurements in a CMOS-fabricated cell, which verified the proposal’s feasibility
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