Efficient Block Scheduling to Minimize Context Switching Time for Programmable Embedded Processors

Scheduling is one of the most often addressed optimization problems in DSP compilation, behavioral synthesis, and system-level synthesis research. With the rapid pace of changes in modern DSP applications requirements and implementation technologies, however, new types of scheduling challenges arise. This paper is concerned with the problem of scheduling blocks of computations in order to optimize the efficiency of their execution on programmable embedded systems under a realistic timing model of their processors. We describe an effective scheme for scheduling the blocks of any computation on a given system architecture and with a specified algorithm implementing each block. We also present algorithmic techniques for performing optimal block scheduling simultaneously with optimal architecture and algorithm selection. Our techniques address the block scheduling problem for both single- and multiple-processor system platforms and for a variety of optimization objectives including throughput, cost, and power dissipation. We demonstrate the practical effectiveness of our techniques on numerous designs and synthetic examples.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/44804/1/10617_2004_Article_239764.pd

Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors

The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-on-a-chip based on core processors, while treating voltage (and correspondingly, the clock frequency) as a variable to be scheduled along with the computation tasks during the static scheduling step. In addition to describing the complete synthesis design flow for these variable voltage systems, we focus on the problem of doing the voltage scheduling while taking into account the inherent limitation on the rates at which the voltage and clock frequency can be changed by the power supply controllers and clock generators. Taking these limits on rate of change into account is crucial since changing the voltage by even a volt may take time equivalent to 100s to 10,000s of instructions on modern processors. We present both an exact but impractical formulation of this scheduling problem as a set of non-linear equations, as well as a heuristic approach based on reduction to an optimally solvable restricted ordered scheduling problem. Using various task mixes drawn from a set of nine real-life applications, our results show that we are able to reduce power consumption to within 7% of the lower bound obtained by imposing no limit at the rate of change of voltage and clock frequencies

Self supervised convolutional kernel based handcrafted feature harmonization: Enhanced left ventricle hypertension disease phenotyping on echocardiography

Radiomics, a medical imaging technique, extracts quantitative handcrafted features from images to predict diseases. Harmonization in those features ensures consistent feature extraction across various imaging devices and protocols. Methods for harmonization include standardized imaging protocols, statistical adjustments, and evaluating feature robustness. Myocardial diseases such as Left Ventricular Hypertrophy (LVH) and Hypertensive Heart Disease (HHD) are diagnosed via echocardiography, but variable imaging settings pose challenges. Harmonization techniques are crucial for applying handcrafted features in disease diagnosis in such scenario. Self-supervised learning (SSL) enhances data understanding within limited datasets and adapts to diverse data settings. ConvNeXt-V2 integrates convolutional layers into SSL, displaying superior performance in various tasks. This study focuses on convolutional filters within SSL, using them as preprocessing to convert images into feature maps for handcrafted feature harmonization. Our proposed method excelled in harmonization evaluation and exhibited superior LVH classification performance compared to existing methods.Comment: 11 pages, 7 figure

Behavioral Synthesis Techniques for Intellectual Property Protection

The economic viability of the reusable core-based design paradigm depends on the development of techniques for intellectual property protection. We introduce the first dynamic watermarking technique for protecting the value of intellectual property of CAD and compilation tools and reusable core components. The essence of the new approach is the addition of a set of design and timing constraints which encodes the author's signature. The constraints are selected in such a way that they result in minimal hardware overhead while embedding the signature which is unique and difficult to detect, remove and forge. We establish the first set of relevant metrics which forms the basis for the quantitative analysis, evaluation, and comparison of watermarking techniques. We develop a generic approach for signature data hiding in designs, which is applicable in conjunction with an arbitrary behavioral synthesis task, such as scheduling, assignment, allocation, and transformations. Error correcting codes are used to augment the protection of the signature data from tampering attempts. On a large set of design examples, studies indicate the effectiveness of the new approach in a sense that the signature data, which are highly resilient, difficult to detect and remove, and yet easy to verify, can be embedded in designs with very low hardware overhead

Power Optimization in Disk-Based Real-Time Application Specific Systems”, UCLA, CS Dept.

ABSTRACT Introduction Magnetic disks are the de-facto standard for providing non-volatile high volume memory capacity in modern computer systems. Disks provide superior trade-off with respect to common design metric such as cost, memory capacity, latency, data input-output bandwidth and reliability in comparison with all other alternatives. Until recently, disks have been used mainly in general purpose computing systems. However, convergence of several application and technological trends resulted in the rapidly increasing importance of massive storage in application specific systems. There is rapid growth in applications such as internet-based servers (e.g. world wide web), video-on-demand, interactive television, and video conferencing, all of which have as dominating components large volume data management. At the same time technological trends indicate that key design metrics of modern and future application specific designs, such as speed, power, and weight, are dominated by massive storage elements. Most often, magnetic disk is already a bottleneck in current application specific computer and communication systems. Another equally pronounced consequence of the current application and technological trends is increasing importance of power minimization. Our main strategic objective is to give impetus for research and development of synthesis and compilation techniques for design of massive storage-based application specific systems. We have three main technical goals in this paper: 1. To establish an accurate, but computationally efficient, performance and power consumption models for disk-based systems. 2. To identify most effective ways to reduce power in disk-based application specific systems. 3. To develop a practical approach and optimization synthesis algorithms for a scheduling and assignment of disk-based real-time systems. The detailed description of the synthesis approach for optimization of disk-based application specific systems can be found in Background Material In this section we first provide an overview of power consumption sources in a disk and briefly discuss the most popular timing models of a magnetic disk. We conclude the section, by explaining the selected hardware and computational models. The detailed description of disk technology is available in Power required by a hard disk drive is consumed by its many different components. To complicate matters even further, the power requirements of each component will vary with the current operational mode of the disk. Common operational modes with different power requirements are: Start-up, Seek, Read/Write: Idle, Standby and Sleep. In each of the distinct operational modes available, a different amount of strain is placed upon each of the individual disk components, varying the amount of power consume

Power Optimization in Disk-Based Real-Time Application Specific Systems

A flurry of modern communications, video, and DSP applications, such as world wide web, interactive high resolution television, video-on-demand, video conferencing, and wireless communications, are mainly data management oriented. In this type of systems, magnetic disk performance is quickly becoming a primary bottleneck which dictates key design metrics of the overall system. At the same time, technology trends imply reduced importance of classical design objectives, such as area and throughput, and together with consumers demand for portability promote power consumption as the principal design metric. While numerous power optimization techniques have been proposed at all levels of design process abstractions for electronic components, until now, power minimization in mixed mechanical-electronic subsystems, such as disks, has not been addressed. We first analyze optimization degrees of freedom for power minimization in disk-based application specific systems. Next, we propose a concep..