Controlling the intrinsic bending of hetero-epitaxial silicon carbide micro-cantilevers

� 2015 AIP Publishing LLC. We introduce a simple methodology to predict and tailor the intrinsic bending of a cantilever made of a single thin film of hetero-epitaxial silicon carbide grown on silicon. The combination of our novel method for the depth profiling of residual stress with a few nm resolution with finite element modelling allows for the prediction of the bending behaviour with great accuracy. We also demonstrate experimentally that a silicon carbide cantilever made of one distinct film type can be engineered to obtain the desired degree of either upward, flat, or downward bending, by selecting the appropriate thickness and cantilever geometry. A precise control of cantilever bending is crucial for microelectrical mechanical system applications such as micro-actuators, micro-switches, and resonant sensors

Electrical challenges of heteroepitaxial 3C-SiC on silicon

© 2018 Trans Tech Publications, Switzerland. We have investigated the electrical conduction in epitaxial cubic silicon carbide films on low-doped and high-resistive silicon substrates. The electrical properties of the film/substrate system such as the carrier concentration, carrier mobility, and sheet resistance were evaluated by performing Hall measurements in a van der Pauw configuration at room temperature. For the SiC on low-doped p-Si, we found that the charge carriers in the substrate always dominate the electrical conduction indicating an electrical shorting of the film to the substrate and the absence of a p/n junction. Meanwhile, for the SiC films grown on high-resistive silicon, we found an evidence of current leakage through a silicon region right below the SiC/Si interface, generated upon SiC growth. Leakage resistances in the kΩ range obtained from TLM structures made of isolated SiC pillars on high-resistive silicon confirmed the presence of a conductive region below the SiC/Si interface. This work also shows that this electrical leakage can be supressed using a high-resistive silicon as the substrate and etching away the conductive region below the interface

Orientation-dependent stress relaxation in hetero-epitaxial 3C-SiC films

Residual stresses in epitaxial 3C-SiC films on silicon, for chosen growth conditions, appear determined by their growth orientation. Stress evaluation locally with Raman spectroscopy, and across a 150 mm wafer with curvature measurements, indicate that thin films can be grown on Si(100) with residual tensile stresses as low as 150 MPa. However, films on Si(111) retain a considerably higher stress, around 900 MPa, with only minor decrease versus film thickness. Stacking faults are indeed geometrically a less efficient relief mechanism for the biaxial strain of SiC films grown on Si(111) with 〈111〉 orientation. Residual stresses can be tuned by the epitaxial process temperatures. © 2013 American Institute of Physics

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

© 2018 Author(s). Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures

Catastrophic degradation of the interface of epitaxial silicon carbide on silicon at high temperatures

© 2016 Author(s). Epitaxial cubic silicon carbide on silicon is of high potential technological relevance for the integration of a wide range of applications and materials with silicon technologies, such as micro electro mechanical systems, wide-bandgap electronics, and graphene. The hetero-epitaxial system engenders mechanical stresses at least up to a GPa, pressures making it extremely challenging to maintain the integrity of the silicon carbide/silicon interface. In this work, we investigate the stability of said interface and we find that high temperature annealing leads to a loss of integrity. High-resolution transmission electron microscopy analysis shows a morphologically degraded SiC/Si interface, while mechanical stress measurements indicate considerable relaxation of the interfacial stress. From an electrical point of view, the diode behaviour of the initial p-Si/n-SiC junction is catastrophically lost due to considerable inter-diffusion of atoms and charges across the interface upon annealing. Temperature dependent transport measurements confirm a severe electrical shorting of the epitaxial silicon carbide to the underlying substrate, indicating vast predominance of the silicon carriers in lateral transport above 25 K. This finding has crucial consequences on the integration of epitaxial silicon carbide on silicon and its potential applications

Non-invasive on-skin sensors for brain machine interfaces with epitaxial graphene.

Objective. Brain-machine interfaces are key components for the development of hands-free, brain-controlled devices. Electroencephalogram (EEG) electrodes are particularly attractive for harvesting the neural signals in a non-invasive fashion.Approach.Here, we explore the use of epitaxial graphene (EG) grown on silicon carbide on silicon for detecting the EEG signals with high sensitivity.Main results and significance.This dry and non-invasive approach exhibits a markedly improved skin contact impedance when benchmarked to commercial dry electrodes, as well as superior robustness, allowing prolonged and repeated use also in a highly saline environment. In addition, we report the newly observed phenomenon of surface conditioning of the EG electrodes. The prolonged contact of the EG with the skin electrolytes functionalize the grain boundaries of the graphene, leading to the formation of a thin surface film of water through physisorption and consequently reducing its contact impedance more than three-fold. This effect is primed in highly saline environments, and could be also further tailored as pre-conditioning to enhance the performance and reliability of the EG sensors

Quasi free-standing epitaxial graphene fabrication on 3C-SiC/Si(111)

© 2018 IOP Publishing Ltd. Growing graphene on SiC thin films on Si is a cheaper alternative to the growth on bulk SiC, and for this reason it has been recently intensively investigated. Here we study the effect of hydrogen intercalation on epitaxial graphene obtained by high temperature annealing on 3C-SiC/Si(111) in ultra-high vacuum. By using a combination of core-level photoelectron spectroscopy, low energy electron diffraction, and near-edge x-ray absorption fine structure (NEXAFS) we find that hydrogen saturates the Si atoms at the topmost layer of the substrate, leading to free-standing graphene on 3C-SiC/Si(111). The intercalated hydrogen fully desorbs after heating the sample at 850 °C and the buffer layer appears again, similar to what has been reported for bulk SiC. However, the NEXAFS analysis sheds new light on the effect of hydrogen intercalation, showing an improvement of graphene's flatness after annealing in atomic H at 600 °C. These results provide new insight into free-standing graphene fabrication on SiC/Si thin films

A thin film approach for SiC-derived graphene as an on-chip electrode for supercapacitors

© 2015 IOP Publishing Ltd. We designed a nickel-assisted process to obtain graphene with sheet resistance as low as 80 Ω square-1 from silicon carbide films on Si wafers with highly enhanced surface area. The silicon carbide film acts as both a template and source of graphitic carbon, while, simultaneously, the nickel induces porosity on the surface of the film by forming silicides during the annealing process which are subsequently removed. As stand-alone electrodes in supercapacitors, these transfer-free graphene-on-chip samples show a typical double-layer supercapacitive behaviour with gravimetric capacitance of up to 65 F g-1. This work is the first attempt to produce graphene with high surface area from silicon carbide thin films for energy storage at the wafer-level and may open numerous opportunities for on-chip integrated energy storage applications

Enhanced Mid -Infrared Reflectance with Graphene Coated Silicon Carbide Nanowires

© 2020 IEEE. The mid-infrared optical spectrum hosts a variety of promising photonic applications. Herein we simulate and experimentally demonstrate reflectance enhancement of MIR light using graphene-coated silicon carbide nanowires on silicon, showing promise for on-chip MIR Nano photonics