Considering the design and operation of a voice controlled laboratory for teaching and learning in electronic engineering

In this paper, the design and operation of a voice controlled electronic engineering laboratory for the teaching and learning of semiconductor device current voltage (IV) characteristics are presented. This is targeted to students studying electronic engineering in a higher education setting. The presented case study experiment operation, based on a Schottky diode forward and reverse bias IV characteristics, is presented. This uses a computer-based interface to an Arduino UNO platform that acts as the experiment test and measurement equipment. The computer side software developed is based on a Python script along with a speech recognition library and the online Google Speech Recognition service for identifying voice commands

Digital IC test development engineering teaching and learning in higher education

This paper will consider the role of technology in the laboratory for a new course (module) in integrated circuit (IC) test development engineering for fifth year students in a higher education programme of study in electronic and computer engineering. Engineering laboratories form an essential part of the higher education learning experience for students in the engineering disciplines. They allow for theoretical aspects of a subject to be experimented with, and in many cases, ideas suitably visualized. This is particularly important to support student learning and understanding. In the electronic and computer engineering disciplines, laboratories can take several different forms from hands-on computer coding through to physical electronic circuit design, build and test exercises. This paper will discuss the development of module, and the creation of a laboratory arrangement using the field programmable gate array (FPGA) for a range of possible teaching and learning scenarios that will focus on required industrial IC test activities

Flexible FPGA based digital IC test development education laboratory design and application

In this paper, a teaching aid for digital integrated circuit (IC) test development engineering education using the field programmable gate array (FPGA) is presented and discussed. The set-up allows for different digital IC test development scenarios to be configured within the FPGA. For analysis and evaluation purposes, embedded machine learning functions could also include automated reporting of the system use. A case study design, using a Xilinx Artix-7 FPGA, incorporating a circuit test set-up for an example digital IC based an implementation of the IEEE Std 1149.1 “IEEE Standard for Test Access Port and Boundary-Scan Architecture” is embedded within the FPGA. This is accessed by the user via a serial port connection. This case study design allows a user to investigate and implement test program development scenarios within a suitable education environment

Remote laboratories as a means to widen participation in STEM education

In this paper, a discussion is presented into how remote laboratories can be utilized in STEM (science, technology, engineering, and mathematics) education in order to provide and promote access to laboratory experiments via the Internet. This provision can be considered from a range of viewpoints in how to use Internet-based technologies to allow remote access to physical laboratory experiments whilst taking into account the needs and wishes of the individual. In recent years, countries around the world have placed an increased emphasis on promoting access to education for traditionally underrepresented groups and also to improve the quality of STEM education. Despite this, gaining access to laboratory facilities and experiments for many people can still be a problem. Remote laboratories can, however, be designed, developed, and deployed to support access to STEM education by providing remote access to facilities that would not otherwise be accessible to an individual. Recently, a range of solutions have been developed and successfully deployed which can be used to both provide access to and improve the quality of an educational offering. This paper will consider how the remote laboratory can be developed and used. It can also be considered as an assistive technology which could be used to provide access to individuals with specific needs, such as disability. The paper will consider what a remote laboratory is and how it can be developed with accessibility in mind

Realization of NumPy Tensordot using the field programmable gate array for embedded machine learning applications

Today, Machine Learning (ML) and Deep Learning (DL) functions are embedded into electronic systems enabling the inclusion of levels of system “intelligence” that otherwise could not be included using non-ML/DL approaches due to design considerations such as the required data processing times. Underlying the ML and DL operations are the necessary processing requirements, data storage (memory) and data structures (the format of the data). In addition, the manner in which the data is processed can be software based, hardware based, or a combination of software and hardware operations. In this paper, the Field Programmable Gate Array (FPGA) is considered to implement a FPGA based implementation of NumPy Tensordot in Python for computing the tensor dot product along specific axes for arrays greater than onedimension. The functionality will be implemented within an embedded Xilinx MicroBlaze processor targeting the Xilinx Artix-7 FPGA

Realizing Mathematics of Arrays Operations as Custom Architecture Hardware-Software Co-Design Solutions

In embedded electronic system applications being developed today, complex datasets are required to be obtained, processed, and communicated. These can be from various sources such as environmental sensors, still image cameras, and video cameras. Once obtained and stored in electronic memory, the data is accessed and processed using suitable mathematical algorithms. How the data are stored, accessed, processed, and communicated will impact on the cost to process the data. Such algorithms are traditionally implemented in software programs that run on a suitable processor. However, different approaches can be considered to create the digital system architecture that would consist of the memory, processing, and communications operations. When considering the mathematics at the centre of the design making processes, this leads to system architectures that can be optimized for the required algorithm or algorithms to realize. Mathematics of Arrays (MoA) is a class of operations that supports n-dimensional array computations using array shapes and indexing of values held within the array. In this article, the concept of MoA is considered for realization in software and hardware using Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) technologies. The realization of MoA algorithms will be developed along with the design choices that would be required to map a MoA algorithm to hardware, software or hardware-software co-designs. </p

Hardware considerations for tensor implementation and analysis using the field programmable gate array

In today’s complex embedded systems targeting internet of things (IoT) applications, there is a greater need for embedded digital signal processing algorithms that can effectively and efficiently process complex data sets. A typical application considered is for use in supervised and unsupervised machine learning systems. With the move towards lower power, portable, and embedded hardware-software platforms that meet the current and future needs for such applications, there is a requirement on the design and development communities to consider different approaches to design realization and implementation. Typical approaches are based on software programmed processors that run the required algorithms on a software operating system. Whilst such approaches are well supported, they can lead to solutions that are not necessarily optimized for a particular problem. A consideration of different approaches to realize a working system is therefore required, and hardware based designs rather than software based designs can provide performance benefits in terms of power consumption and processing speed. In this paper, consideration is given to utilizing the field programmable gate array (FPGA) to implement a combined inner and outer product algorithm in hardware that utilizes the available hardware resources within the FPGA. These products form the basis of tensor analysis operations that underlie the data processing algorithms in many machine learning systems

Rail-to-rail op-amp design incorporating negative miller and miller compensation

This paper considers and presents the design of a rail-to-rail input and output CMOS (complementary metal oxide semiconductor) two-stage operational amplifier (op-amp). The design uses two capacitance based compensation techniques for controlling stability and frequency response, the conventional Miller and negative Miller capacitances. The negative Miller capacitance is constructed around the first amplification stage and the conventional Miller capacitance is constructed around the second amplification stage. By setting suitable capacitance values, the conventional Miller and negative Miller capacitances allow the designer to control stability margins and frequency response. The design is based on a low-power design where the first stage consists of complementary differential input and summing circuit, and the second stage is a class-AB amplifier. The design has been created using a 0.35 μm CMOS (n-well) technology, its operation strategy simulated using the Cadence Spectre simulator and operates on a +3.3 V power supply

Utilization of data classification in the realization of a surface plasmon resonance readout system using an FPGA controlled RGB LED light source

This work presents the realization of a surface Plasmon resonance (SPR) sensor readout system using a tricolor red, green and blue (RGB) light emitting diode (LED) light source. Time domain intensity modulation of each color channel is applied to interrogate three bands of interest in the SPR spectrum using a single photodiode detector. A low computing resource classification approach is used through the combination of k-nearest neighbor (kNN) and adapted clustering using representative (CURE). An optimized number of representatives is chosen in the validation process to reduce the required amount of data for the kNN classification. This scheme was used to classify the concentrations of different glucose solutions. The sensor readout system hardware is based on the use of a field programmable gate array (FPGA) and the glucose solution classification is developed and undertaken on a personal computer (PC) using the Python open source programming language

Plastic optical fibre sensor system design using the field programmable gate array

Extrinsic optical fibre sensor (OFS) systems use a fibre optic cable as the medium for signal propagation between the sensor and the sensor electronics using light rather than electrical signals. A range of different optical fibre sensors have been developed and electronic hardware system designs interfacing the sensor with external electronic systems devised. In this chapter, the use of the field programmable gate array (FPGA) is considered to implement the circuit functions that are required within a portable optical fibre sensor system that uses a light emitting diode (LED) as the light source, a photodiode as the light receiver and the FPGA to implement the system control, digital signal processing (DSP) and communications operations. The capabilities of the FPGA will be investigated and a case study sensor design introduced and elaborated. The OFS system will be based on the FPGA and will provide wireless communications to an external supervisory system. The chapter will commence with an overview of OFS systems and the typical architecture of the system. Then the FPGA will be introduced and discussed as a hardware alternative to a software programmed processor that is currently widely used. A case study will then be presented with a discussion into design considerations